EPM9560RC304-2 vs EPM9560RC304-2N 比較
詳細な並列比較: EPM9560RC304-2 メーカー: Intel および EPM9560RC304-2N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 Obsolete仕様比較
| パラメータ | EPM9560RC304-2 | EPM9560RC304-2N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $55.00 | $149.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: LAB count] |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | — |
| パッケージ | 304-pin RQFP (RC) | RQFP/RBGA-class 304-pin plastic carrier (RC304) |
| Speed Grade | -2 | -2 (mid-band) |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | EPROM/EEPROM, non-volatile |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| 動作温度 | Commercial (0C to +70C) | 0C to +70C (commercial) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD value in ns] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage Tolerance | — | 5.0 V (3.3 V with level shifting) |
| In-System Programming | — | IEEE 1149.1 JTAG |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |