EPM9560RC304-2 vs EPM9560RC304C-3 Comparación
Comparación detallada lado a lado de EPM9560RC304-2 por Intel y EPM9560RC304C-3 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteAltera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 ObsoleteComparación de especificaciones
| Parámetro | EPM9560RC304-2 | EPM9560RC304C-3 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $55,00 | $95,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD (EPLD) |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | — |
| Macrocells | [DATA_NEEDED: macrocell count] | — |
| User I/O Pins | 304 | 212 |
| Encapsulado | 304-pin RQFP (RC) | RBGGA-304 (Ceramic Ball Grid Array) |
| Speed Grade | -2 | -3 (3 ns pin-to-pin, commercial) |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | IEEE 1149.1 boundary-scan |
| Temperatura de funcionamiento | Commercial (0C to +70C) | 0 C to +70 C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | unknown (legacy part, pre-RoHS era) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Macrocells (Logic Elements) | — | 560 |
| Recuento de pines | — | 304 |
| Tensión de alimentación | — | 5 V |
| Programmability | — | In-system, non-volatile EEPROM |
| Logic Blocks | — | Logic Array Blocks (LABs) with PIA interconnect |