EPM9560WC208-15 vs EPM9560RC208-15N Comparación
Comparación detallada lado a lado de EPM9560WC208-15 por Altera y EPM9560RC208-15N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM9560WC208-15 | EPM9560RC208-15N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $105,00 | $19,85 |
| Family | MAX 9000 | — |
| Device Type | EE PLD (Electrically Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Technology | CMOS | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 16 |
| Flip-Flops | 772 | — |
| User I/O Pins (max) | 149 | — |
| Frecuencia de reloj máxima | 117.6 MHz | — |
| Propagation Delay (tPD) | 16.6 ns | — |
| Speed Grade | -15 | -15 (15 ns tPD) |
| Supply Voltage - I/O | 3.3 V or 5.0 V (configurable) | — |
| Encapsulado | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1 boundary scan) | — |
| Estado RoHS | RoHS3 Compliant (per third-party listings) | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] |
| Series | — | MAX 9000 |
| Usable Gates | — | 12,000 |
| User I/O | — | 212 (in 208-RQFP, see family datasheet) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Internal Frequency | — | 117.6 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| Configuration Memory | — | CMOS EEPROM (non-volatile) |
| Operating Temperature (commercial) | — | 0C to +70C |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |