IR2104SPBF vs IRS2101STRPBF Comparación
Comparación detallada lado a lado de IR2104SPBF por Infineon y IRS2101STRPBF por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | IR2104SPBF | IRS2101STRPBF |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,41 | $1,18 |
| Función | Half-bridge gate driver | — |
| Number of Drivers | 2 (high-side + low-side) | 2 |
| Configuration | High and Low Side | — |
| Input Type | Logic (non-inverting) | — |
| Maximum Offset / Bootstrap Supply Voltage | 600 V | — |
| Gate Drive Supply Range (VCC) | 10 V to 20 V | — |
| Output Source Current | 130 mA typical | — |
| Output Sink Current | 270 mA typical | — |
| Propagation Delay | 680 ns typical | — |
| Tiempo de subida | 160 ns typical | — |
| Tiempo de bajada | 60 ns typical | — |
| Logic Input Compatibility | 3.3 V, 5 V, 15 V CMOS/LSTTL | 3.3 V / 5 V / 15 V |
| Undervoltage Lockout | Yes (VCC UVLO) | Yes (VCC and VBS) |
| Deadtime | Internally set | — |
| Cross-Conduction Prevention | Yes | — |
| Rango de temperatura de funcionamiento | -40 C to +125 C | — |
| Encapsulado | 8-pin SOIC | 8-SOIC (SOIC-8) |
| Estado RoHS | Compliant (PBF suffix indicates lead-free) | Compliant (PBF suffix) |
| Driver Type | — | High-Side, Low-Side (Half-Bridge) |
| Número de salidas | — | 2-OUT |
| Configuración de salida | — | Non-Inverting |
| Maximum Offset Voltage | — | 600 V |
| Gate Drive Supply (VCC) | — | 10 V to 20 V |
| Bootstrap Supply (VBS) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.6 A |
| VS Transient Range | — | -5 V to +600 V (logic operational) |
| Propagation Delay Matching | — | Matched both channels |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Temperatura de funcionamiento | — | -40C to +125C |
| Tipo de montaje | — | Surface Mount |
| Packaging | — | Tape & Reel (TRPBF) |
| Technology | — | HVIC + latch-immune CMOS |