LFE2-6E-6T144I vs LFE2-6E-5T144I Comparación
Comparación detallada lado a lado de LFE2-6E-6T144I por Lattice Semiconductor y LFE2-6E-5T144I por Lattice Semiconductor. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | LFE2-6E-6T144I | LFE2-6E-5T144I |
|---|---|---|
| Marca | Lattice Semiconductor | Lattice Semiconductor |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $0,00 |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) IC | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Elements | 6,000 logic cells | — |
| Logic Array Blocks | 750 LABs/CLBs | — |
| User I/O | 90 I/O | — |
| Embedded RAM | 56,320 RAM bits | — |
| DSP Capability | DSP supported | — |
| Nominal Supply Voltage | 1.2 V | — |
| Operating Supply Voltage Range | 1.14 V to 1.26 V | — |
| Speed Grade | -6 | — |
| Temperature Designator | I | — |
| Temperatura de unión de funcionamiento | -40 °C to [DATA_NEEDED: upper operating junction temperature] | -40°C to +100°C |
| Encapsulado | 144-LQFP | 144-pin TQFP, 20 x 20 mm |
| Package Size | 20 mm x 20 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Logic Resources | 6000-cell FPGA | — |
| Configuration Method | [DATA_NEEDED: configuration interface and programming mode] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Logic Capacity | — | 6K LUTs |
| User-Programmable I/O | — | 90 I/O |
| RAM Capacity | — | 56,320 RAM bits |
| Core Supply Voltage | — | 1.2 V nominal |
| Operating Voltage Range | — | 1.14 V to 1.26 V |
| Device Speed Grade | — | -5 |
| Logic Technology | — | 90 nm FPGA technology |
| DSP Feature | — | Advanced DSP blocks |
| Pin Pitch | — | [DATA_NEEDED: package pin pitch] |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| Frecuencia de reloj máxima | — | [DATA_NEEDED: maximum clock frequency] |
| Embedded Memory Type | — | [DATA_NEEDED: block RAM and distributed RAM details] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| REACH Status | — | [DATA_NEEDED: REACH status] |