LFE2-6E-6T144I vs LFE2-6E-5T144I Comparaison
Comparaison détaillée côte à côte de LFE2-6E-6T144I par Lattice Semiconductor et LFE2-6E-5T144I par Lattice Semiconductor. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | LFE2-6E-6T144I | LFE2-6E-5T144I |
|---|---|---|
| Marque | Lattice Semiconductor | Lattice Semiconductor |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | ECP2 Field Programmable Gate Array (FPGA) IC | ECP2 Field Programmable Gate Array (FPGA) |
| Logic Elements | 6,000 logic cells | — |
| Logic Array Blocks | 750 LABs/CLBs | — |
| User I/O | 90 I/O | — |
| Embedded RAM | 56,320 RAM bits | — |
| DSP Capability | DSP supported | — |
| Nominal Supply Voltage | 1.2 V | — |
| Operating Supply Voltage Range | 1.14 V to 1.26 V | — |
| Speed Grade | -6 | — |
| Temperature Designator | I | — |
| Température de jonction en fonctionnement | -40 °C to [DATA_NEEDED: upper operating junction temperature] | -40°C to +100°C |
| Boîtier | 144-LQFP | 144-pin TQFP, 20 x 20 mm |
| Package Size | 20 mm x 20 mm | — |
| Type de montage | Surface Mount | Surface Mount |
| Logic Resources | 6000-cell FPGA | — |
| Configuration Method | [DATA_NEEDED: configuration interface and programming mode] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Logic Capacity | — | 6K LUTs |
| User-Programmable I/O | — | 90 I/O |
| RAM Capacity | — | 56,320 RAM bits |
| Core Supply Voltage | — | 1.2 V nominal |
| Operating Voltage Range | — | 1.14 V to 1.26 V |
| Device Speed Grade | — | -5 |
| Logic Technology | — | 90 nm FPGA technology |
| DSP Feature | — | Advanced DSP blocks |
| Pin Pitch | — | [DATA_NEEDED: package pin pitch] |
| Configuration Interface | — | [DATA_NEEDED: configuration interface] |
| Fréquence d'horloge maximale | — | [DATA_NEEDED: maximum clock frequency] |
| Embedded Memory Type | — | [DATA_NEEDED: block RAM and distributed RAM details] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| REACH Status | — | [DATA_NEEDED: REACH status] |