MAX181CCPL vs MAX181AEPL Comparación
Comparación detallada lado a lado de MAX181CCPL por Maxim Integrated y MAX181AEPL por Maxim Integrated. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | MAX181CCPL | MAX181AEPL |
|---|---|---|
| Marca | Maxim Integrated | Maxim Integrated |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,95 | $17,20 |
| Resolución | 12 bits | 12 bit |
| Number of Analog Input Channels | 8 | 8 |
| Frecuencia de muestreo | 100 ksps | — |
| ADC Architecture | Successive Approximation (SAR) | — |
| Input Type | Single-Ended, Multiplexed | — |
| Data Interface | Parallel (Word Access) | — |
| Tensión de alimentación | +5 V single supply | — |
| On-Chip Reference | Yes (5 V, internal) | — |
| Sample-and-Hold | Internal (Track/Hold) | — |
| Rango de temperatura de funcionamiento | 0°C to +70°C (Commercial 'C' grade) | 0 C to +70 C (E suffix, industrial) |
| Encapsulado | PDIP-40 (Plastic DIP, 0.600 inch / 15.24 mm) | 40-pin PDIP (PL) |
| Tipo de montaje | Through-Hole | Through-Hole (DIP) |
| Temperature Grade | Commercial | — |
| Power Dissipation (typ) | 75 mW at 100 ksps | — |
| Estado RoHS | [DATA_NEEDED: RoHS status not in verified web data] | [DATA_NEEDED: RoHS compliance status] |
| Product Type | — | Data Acquisition System (DAS) / SAR ADC |
| Channel Configuration | — | Single-ended or differential (software-selectable) |
| Conversion Architecture | — | Successive Approximation with Track-and-Hold |
| Throughput (max) | — | 100 ksps |
| Rango de tensión de entrada | — | 0 to +5 V (unipolar) / ±5 V (bipolar) at +5 V supply |
| Analog Supply Voltage | — | +5 V (analog) and +12 V to +15 V or ±12 V to ±15 V |
| Digital Supply Voltage | — | +5 V |
| Internal Reference | — | Yes, low-drift buried zener reference |
| Microprocessor Interface | — | 8-/12-bit µP-compatible parallel bus |
| Recuento de pines | — | 40 |