MAX181CCPL vs MAX181AEPL 对比

详细并排对比 MAX181CCPL 出自 Maxim Integrated 和 MAX181AEPL 出自 Maxim Integrated。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 MAX181CCPL MAX181AEPL
品牌 Maxim Integrated Maxim Integrated
分类 ADC/DAC ADC/DAC
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $5.95 $17.20
分辨率 12 bits 12 bit
Number of Analog Input Channels 8 8
采样率 100 ksps —
ADC Architecture Successive Approximation (SAR) —
Input Type Single-Ended, Multiplexed —
Data Interface Parallel (Word Access) —
电源电压 +5 V single supply —
On-Chip Reference Yes (5 V, internal) —
Sample-and-Hold Internal (Track/Hold) —
工作温度范围 0°C to +70°C (Commercial 'C' grade) 0 C to +70 C (E suffix, industrial)
封装 PDIP-40 (Plastic DIP, 0.600 inch / 15.24 mm) 40-pin PDIP (PL)
安装类型 Through-Hole Through-Hole (DIP)
Temperature Grade Commercial —
Power Dissipation (typ) 75 mW at 100 ksps —
RoHS 状态 [DATA_NEEDED: RoHS status not in verified web data] [DATA_NEEDED: RoHS compliance status]
Product Type — Data Acquisition System (DAS) / SAR ADC
Channel Configuration — Single-ended or differential (software-selectable)
Conversion Architecture — Successive Approximation with Track-and-Hold
Throughput (max) — 100 ksps
输入电压范围 — 0 to +5 V (unipolar) / ±5 V (bipolar) at +5 V supply
Analog Supply Voltage — +5 V (analog) and +12 V to +15 V or ±12 V to ±15 V
Digital Supply Voltage — +5 V
Internal Reference — Yes, low-drift buried zener reference
Microprocessor Interface — 8-/12-bit µP-compatible parallel bus
引脚数量 — 40

数据手册与资源

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