MM74C948N vs ADC0809CCN Comparación
Comparación detallada lado a lado de MM74C948N por Texas Instruments y ADC0809CCN por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
MM74C948N - 8-Bit ADC w/ 16-Ch MUX | Texas Instruments | DIP-40
MM74C948N Obsolete
Comparación de especificaciones
| Parámetro | MM74C948N | ADC0809CCN |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,05 | $3,40 |
| Resolución | 8 bit | 8 bits |
| Architecture | Successive Approximation (SAR) | Successive Approximation (SAR) |
| Number of Analog Input Channels | 16 (single-ended, multiplexed) | — |
| Tensión de alimentación | 5 V (single supply) | — |
| Maximum Conversion Time | 116 us | — |
| Technology | CMOS | — |
| Interfaz | Microprocessor-compatible parallel | — |
| Temperatura de funcionamiento | -40C to +85C | -40 °C to +85 °C |
| Temperature Grade | Industrial | — |
| Encapsulado | PDIP-40 (N) | 28-pin PDIP (through-hole) |
| Tipo de montaje | Through-Hole | Through-Hole (DIP) |
| Terminal Form | Through-Hole | — |
| Package Code | DIP | — |
| Number of Terminals | 40 | — |
| Package Shape | Rectangular | — |
| Estado RoHS | [DATA_NEEDED: RoHS status - datasheet predates RoHS era] | Compliant (NOPB variant); non-compliant legacy |
| Number of Channels | — | 8 single-ended |
| Sample Rate (max) | — | 10 kSPS |
| Input Type | — | Single-Ended, Multiplexed |
| Supply Voltage (VCC) | — | 4.5 V to 5.25 V (5 V typical) |
| Corriente de alimentación | — | [DATA_NEEDED: typical quiescent current] |
| Analog Input Voltage Range | — | 0 V to VCC |
| Integral Nonlinearity (INL) | — | ±1 LSB max |
| Differential Nonlinearity (DNL) | — | ±1 LSB max (no missing codes) |
| Conversion Time (typ) | — | [DATA_NEEDED: at fCLK] |
| Clock Frequency | — | 10 kHz to 1.1 MHz |
| Tensión de referencia | — | Internal 256R ladder, VREF+ / VREF- pins |
| Digital I/O Logic Level | — | TTL/CMOS compatible |
| Output Interface | — | 8-bit parallel, tri-state latched |
| Channel Selection | — | 3-bit address latch (A0/A1/A2) |