MPC852TVR50A-FR vs MPC852TVR50A Comparación
Comparación detallada lado a lado de MPC852TVR50A-FR por NXP Semiconductors y MPC852TVR50A por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MPC852TVR50A-FR - 50MHz PowerQUICC MPU | NXP | Networking
MPC852TVR50A-FR ⚠ Última compraNXP Semiconductors
MPC852TVR50A - PowerQUICC 32-Bit MPU, 50 MHz, 256-PBGA | NXP
MPC852TVR50A ⚠ Última compraComparación de especificaciones
| Parámetro | MPC852TVR50A-FR | MPC852TVR50A |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,80 | $23,90 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | — |
| Processor Series | PowerQUICC MPC852T | MPC8xx PowerQUICC |
| Core Architecture | Power Architecture (MPC8xx) 32-bit | — |
| Core Frequency | 50 MHz | — |
| Number of Cores | 1 (host) + 2 CPM RISC engines | — |
| Ancho del bus de datos | 32-bit | 32 bit |
| Integrated Ethernet MAC | 10/100 Mbps (Fast Ethernet) | — |
| Communication Engines | 2x RISC CPM (HDLC/SDLC, UART, SPI, I2C) | — |
| Memory Controller | SDRAM/SRAM/Flash (external bus, 32-bit) | — |
| Temperatura de funcionamiento | 0C to +95C | 0 C to +95 C |
| Encapsulado | 256-PBGA (23x23 mm, 1.0 mm pitch) | 256-PBGA (23x23 mm) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Supply Voltage (Core) | 3.3 V | — |
| Compliance | RoHS (per -FR suffix packaging code, status [DATA_NEEDED: detailed RoHS test report]) | — |
| Part Suffix | -FR (NXP tray / lead-free packaging variant) | — |
| Mouser Product Category | Microprocessors - MPU Ethernet 50 MHz | — |
| Core | — | MPC8xx, 1 Core |
| Frecuencia de reloj máxima | — | 50 MHz |
| Tensión de alimentación de funcionamiento | — | 3.3 V |
| Instruction/Data Cache | — | 16 KB unified |
| Communications Processor Module | — | Integrated (CPM with Ethernet, HDLC, UART) |
| On-Chip Peripherals | — | UART, Timers, Parallel I/O, SCC |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |
| Lifecycle | — | End of Life / Last Time Buy (per NXP product page) |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |
| RoHS Compliant | — | [DATA_NEEDED: RoHS] |