MPC852TVR50A-FR vs MPC852TVR50A Comparaison
Comparaison détaillée côte à côte de MPC852TVR50A-FR par NXP Semiconductors et MPC852TVR50A par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC852TVR50A-FR - 50MHz PowerQUICC MPU | NXP | Networking
MPC852TVR50A-FR ⚠ Dernier achatNXP Semiconductors
MPC852TVR50A - PowerQUICC 32-Bit MPU, 50 MHz, 256-PBGA | NXP
MPC852TVR50A ⚠ Dernier achatComparaison des spécifications
| Paramètre | MPC852TVR50A-FR | MPC852TVR50A |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $22,80 | $23,90 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | — |
| Processor Series | PowerQUICC MPC852T | MPC8xx PowerQUICC |
| Core Architecture | Power Architecture (MPC8xx) 32-bit | — |
| Core Frequency | 50 MHz | — |
| Number of Cores | 1 (host) + 2 CPM RISC engines | — |
| Largeur du bus de données | 32-bit | 32 bit |
| Integrated Ethernet MAC | 10/100 Mbps (Fast Ethernet) | — |
| Communication Engines | 2x RISC CPM (HDLC/SDLC, UART, SPI, I2C) | — |
| Memory Controller | SDRAM/SRAM/Flash (external bus, 32-bit) | — |
| Température de fonctionnement | 0C to +95C | 0 C to +95 C |
| Boîtier | 256-PBGA (23x23 mm, 1.0 mm pitch) | 256-PBGA (23x23 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Supply Voltage (Core) | 3.3 V | — |
| Compliance | RoHS (per -FR suffix packaging code, status [DATA_NEEDED: detailed RoHS test report]) | — |
| Part Suffix | -FR (NXP tray / lead-free packaging variant) | — |
| Mouser Product Category | Microprocessors - MPU Ethernet 50 MHz | — |
| Core | — | MPC8xx, 1 Core |
| Fréquence d'horloge maximale | — | 50 MHz |
| Tension d'alimentation de fonctionnement | — | 3.3 V |
| Instruction/Data Cache | — | 16 KB unified |
| Communications Processor Module | — | Integrated (CPM with Ethernet, HDLC, UART) |
| On-Chip Peripherals | — | UART, Timers, Parallel I/O, SCC |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |
| Lifecycle | — | End of Life / Last Time Buy (per NXP product page) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| RoHS Compliant | — | [DATA_NEEDED: RoHS] |