MPC859TVR100A vs MPC859TCVR100A Comparación
Comparación detallada lado a lado de MPC859TVR100A por NXP Semiconductors y MPC859TCVR100A por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | MPC859TVR100A | MPC859TCVR100A |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,65 | $42,45 |
| Processor Series | MPC8xx PowerQUICC | — |
| Core Architecture | 32-bit Power Architecture | — |
| Core Count | 1 | — |
| Core Frequency | 100 MHz | 100 MHz |
| Operating Voltage (Core) | 1.8 V | [DATA_NEEDED: core VDD] |
| Operating Voltage (I/O) | 3.3 V | [DATA_NEEDED: I/O VDD] |
| Process Technology | 0.18 µm CMOS | [DATA_NEEDED: process node] |
| Encapsulado | 357-PBGA (25 mm x 25 mm) | 357-PBGA (25x25 mm) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Temperatura de funcionamiento | 0 °C to +95 °C | -40C to +100C |
| Integrated Module | CPM (Communications Processor Module) | — |
| Serial Interfaces | SCC, FCC, SPI, I2C (via CPM) | — |
| Ancho del bus de datos | 32-bit | — |
| Estado RoHS | Compliant | [DATA_NEEDED: lead-free/RoHS status] |
| Lead-Free Status | Lead Free | — |
| Packaging | Tray | — |
| Architecture | — | 32-bit Power Architecture (PowerPC 8xx family) |
| Core | — | MPC8xx 1 Core, 32-Bit |
| Instruction Set | — | PowerPC |
| Memory Controller | — | 8/16/32-bit ROM/FLASH/SRAM/DRAM |
| Communications Processor Module | — | Yes (CPM with serial channels) |
| Local Bus | — | 32-bit PC-AT ISA-style (M68000 bus compatible) |
| PCMCIA Interface | — | Yes, 2 card slots supported |
| Timers | — | Four 16-bit timers |
| Interrupt Controller | — | Integrated in SIU |
| DMA | — | Integrated in CPM (peripheral DMA) |