MPC860DECZQ50D4 vs MPC860SRCZQ50D4 Comparación
Comparación detallada lado a lado de MPC860DECZQ50D4 por NXP Semiconductors y MPC860SRCZQ50D4 por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MPC860DECZQ50D4 - 50MHz PowerQUICC MPU, 357-BGA | NXP
MPC860DECZQ50D4 ⚠ Última compraNXP Semiconductors
MPC860SRCZQ50D4 - PowerQUICC 50MHz MPU, 357-PBGA | NXP
MPC860SRCZQ50D4 ⚠ Última compraComparación de especificaciones
| Parámetro | MPC860DECZQ50D4 | MPC860SRCZQ50D4 |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15,20 | $64,50 |
| Core Processor | MPC8xx PowerQUICC, 32-bit Power Architecture | — |
| Number of Cores | 1 | — |
| Bus Width | 32-bit | — |
| Core Speed | 50 MHz | — |
| Co-Processors / DSP | Communications; CPM (Communications Processor Module) | — |
| RAM Controllers | DRAM | — |
| On-Chip Cache | 4 KB instruction + 4 KB data | — |
| MMU | Yes (integrated, with translation tables) | — |
| Ethernet | 2x 10 Mbps MAC (MII) | — |
| Serial Communications Controllers (SCC) | 4 | — |
| Serial Management Controllers (SMC) | 2 | — |
| DMA Channels | 4 | — |
| Tensión de alimentación | 3.3 V (core 2.2 V, I/O 3.3 V) | 3.3 V |
| Temperatura de funcionamiento | -40 C to +95 C | — |
| Encapsulado | 357-PBGA, 25x25 mm | 357-PBGA (25x25 mm) |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount |
| Lead Status | Contains Lead | — |
| Estado RoHS | Non-Compliant (legacy BGA with lead-bearing solder balls) | RoHS status per datasheet |
| Packaging | Tray (D4 suffix) | Tray |
| Processor Family | — | MPC8xx PowerQUICC |
| Core Architecture | — | PowerPC 32-bit |
| Core Count | — | 1 |
| Operating Frequency | — | 50 MHz |
| Process Technology | — | 0.32 µm CMOS |
| Instruction Cache | — | 4 KB |
| Data Cache | — | 4 KB |
| Integrated CPM | — | Yes (QUICC engine, multiple SCCs/SMCs) |
| External Bus Width | — | 32-bit |
| Lead Free Status | — | Contains Lead |
| Estado del ciclo de vida | — | Discontinuance / Last Time Buy per NXP PCN |