P1022NXN2LFB vs P1022NXE2LFB Comparación
Comparación detallada lado a lado de P1022NXN2LFB por NXP Semiconductors y P1022NXE2LFB por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
P1022NXN2LFB - QorIQ Dual-Core 1.067 GHz SoC | NXP | Networking
P1022NXN2LFB ⚠ Última compraComparación de especificaciones
| Parámetro | P1022NXN2LFB | P1022NXE2LFB |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $78,40 | $73,40 |
| Architecture | Power Architecture e500 dual-core (RISC, 32-bit) | PowerPC e500v2 (32-bit) |
| Clock Speed (Core) | 1.067 GHz | — |
| Platform Version | 1067/533/667 ET NE r1.1 | — |
| Core Count | 2 | — |
| Package Type | TEPBGA-689 (Plastic, halogen-free, RoHS-compliant) | — |
| Package Dimensions | 31 x 31 mm, 2.23 mm height | — |
| Recuento de pines | 689 | — |
| Temperatura de funcionamiento | -40 °C to +125 °C (industrial) | -40C to +125C (industrial, E grade) |
| Tensión de alimentación | 3.13 V to 3.47 V | — |
| Memory Controller | DDR2/DDR3 with ECC support, up to 32-bit | DDR2 / DDR3 with ECC, 16-bit / 32-bit, 800 MHz data rate |
| Ethernet MACs | 3 x 10/100/1000 Mbps Gigabit | Two 10/100/1000 Mbps (RGMII / SGMII) |
| PCIe Interfaces | 3 x PCIe Gen1 | — |
| USB | USB 2.0 host/device | — |
| Display Controller | 32-bit LCD controller | — |
| Security Engine | Integrated (symmetric/asymmetric crypto acceleration) | SEC with DES / 3DES / AES, public-key accelerator |
| RoHS Compliance | Yes (halogen-free) | — |
| Tipo de montaje | Surface Mount (BGA, requires thermal via array under die) | — |
| Family | — | QorIQ P1 |
| Number of Cores | — | 2 |
| Maximum Core Frequency | — | 1.055 GHz |
| L1 Cache per Core | — | 32 KB I-cache + 32 KB D-cache |
| Coherency Fabric | — | CoreNet |
| PCI Express | — | Three controllers, Gen 1 / Gen 2 |
| USB Controllers | — | Two USB 2.0 (host + device / dual host) |
| LCD Controller | — | Yes (integrated) |
| Packaging | — | 689-TEPBGA II (Plastic Enhanced BGA, 31 x 31 mm, lead-free) |
| Terminal Pitch | — | 1 mm |
| Process Technology | — | 65 nm CMOS |
| Estado RoHS | — | Lead-free ball finish (FB suffix), RoHS compliant |