RTAX1000S-LG624V vs RTAX1000SL-LG624E Comparación
Comparación detallada lado a lado de RTAX1000S-LG624V por Microchip Technology y RTAX1000SL-LG624E por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX1000S-LG624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000S-LG624V ✓ ActivoMicrochip Technology
RTAX1000SL-LG624E - 1M-Gate Rad-Tolerant FPGA 624-LGA | Microchip
RTAX1000SL-LG624E ✓ ActivoComparación de especificaciones
| Parámetro | RTAX1000S-LG624V | RTAX1000SL-LG624E |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2.600,00 | $0,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 1,000,000 | 1,000,000 |
| Logic Cells | 18144 | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Technology | Digital CMOS, antifuse-based | — |
| Core Supply Voltage | 1.5 V (nominal) | 1.5 V |
| Configuration Type | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Encapsulado | CG624 (624-pin ceramic column grid array, LG624) | 624-Pin LGA (CBGA624), Ceramic |
| Temperatura de funcionamiento | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Application Domain | Space-flight systems, radiation-tolerant | — |
| Maximum Family Density | 4,000,000 equivalent system gates (family) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Number of User I/O | [DATA_NEEDED: number of user I/O for LG624 package] | — |
| Block RAM Capacity | [DATA_NEEDED: embedded SRAM bit capacity] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| ASIC Gates | — | 125,000 |
| Logic Cells (CLBs) | — | 12,096 |
| Maximum Combinatorial Delay per CLB | — | 0.93 ns |
| Maximum Frequency | — | 581 MHz |
| Process Technology | — | 0.15 um CMOS |
| Packaging | — | Box |
| Technology Base | — | CMOS, Antifuse |
| Configuration | — | Live-at-power-up (no external configuration device) |
| I/O Voltage Range | — | [DATA_NEEDED: I/O voltage range] |
| TID Rating | — | [DATA_NEEDED: total ionizing dose rating] |
| SEU Immunity | — | [DATA_NEEDED: single-event upset immunity figure] |