RTAX4000DL-CQ352E vs RTAX4000DL-CQ352B Comparación
Comparación detallada lado a lado de RTAX4000DL-CQ352E por Microchip Technology y RTAX4000DL-CQ352B por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX4000DL-CQ352E - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000DL-CQ352E ✓ ActivoMicrochip Technology
RTAX4000DL-CQ352B - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000DL-CQ352B ✓ ActivoComparación de especificaciones
| Parámetro | RTAX4000DL-CQ352E | RTAX4000DL-CQ352B |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $6.900,00 |
| Manufacturer | Microchip Technology (Actel/Microsemi) | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-DSP radiation-tolerant FPGA |
| Equivalent System Gates | 4,000,000 gates | 4,000,000 gates |
| Logic Cells | 55,440 | 55,440 |
| CLBs | 36,960 | — |
| Process Technology | CMOS | 0.15 um CMOS |
| Programmability | Antifuse (live-at-power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with FIFO control logic |
| DSP Resources | Dedicated multiply-accumulate blocks (RTAX-DSP variant) | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Encapsulado | CQ352 ceramic column package, 352 pins | 352-terminal CQFP (CQ352), ceramic metal-sealed cofired flatpack |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID and SEE qualified per family datasheet) | — |
| Configuration | True single-chip form factor | — |
| Estado RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| CLB Count | — | 36,960 CLBs |
| User I/O | — | 166 inputs / 166 outputs |
| Core Supply Voltage | — | 1.5 V |
| Package Dimensions | — | 48 mm x 48 mm |
| Package JESD-30 Code | — | S-CQFP with guard ring |
| Temperatura de funcionamiento | — | -55C to +125C |
| Program Type | — | One-time programmable antifuse |
| DSP Blocks | — | Yes (DL = DSP-enabled variant) |
| Power-Up Operation | — | Live at power-up (single chip) |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O voltage] |