RTAX4000DL-CQ352E vs RTAX4000DL-CQ352B Comparaison
Comparaison détaillée côte à côte de RTAX4000DL-CQ352E par Microchip Technology et RTAX4000DL-CQ352B par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX4000DL-CQ352E - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000DL-CQ352E ✓ ActifMicrochip Technology
RTAX4000DL-CQ352B - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000DL-CQ352B ✓ ActifComparaison des spécifications
| Paramètre | RTAX4000DL-CQ352E | RTAX4000DL-CQ352B |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $6 900,00 |
| Manufacturer | Microchip Technology (Actel/Microsemi) | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-DSP radiation-tolerant FPGA |
| Equivalent System Gates | 4,000,000 gates | 4,000,000 gates |
| Logic Cells | 55,440 | 55,440 |
| CLBs | 36,960 | — |
| Process Technology | CMOS | 0.15 um CMOS |
| Programmability | Antifuse (live-at-power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with FIFO control logic |
| DSP Resources | Dedicated multiply-accumulate blocks (RTAX-DSP variant) | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Boîtier | CQ352 ceramic column package, 352 pins | 352-terminal CQFP (CQ352), ceramic metal-sealed cofired flatpack |
| Type de montage | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID and SEE qualified per family datasheet) | — |
| Configuration | True single-chip form factor | — |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| CLB Count | — | 36,960 CLBs |
| User I/O | — | 166 inputs / 166 outputs |
| Core Supply Voltage | — | 1.5 V |
| Package Dimensions | — | 48 mm x 48 mm |
| Package JESD-30 Code | — | S-CQFP with guard ring |
| Température de fonctionnement | — | -55C to +125C |
| Program Type | — | One-time programmable antifuse |
| DSP Blocks | — | Yes (DL = DSP-enabled variant) |
| Power-Up Operation | — | Live at power-up (single chip) |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O voltage] |