SN75LVDS84ADGG vs SN75LVDS84ADGGR Comparación
Comparación detallada lado a lado de SN75LVDS84ADGG por Texas Instruments y SN75LVDS84ADGGR por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Texas Instruments
SN75LVDS84ADGG - FlatLink 21:3 LVDS Transmitter | Texas Instruments
SN75LVDS84ADGG ✓ ActivoTexas Instruments
SN75LVDS84ADGGR - 21:3 FlatLink LVDS Transmitter 48-TSSOP | TI
SN75LVDS84ADGGR ✓ ActivoComparación de especificaciones
| Parámetro | SN75LVDS84ADGG | SN75LVDS84ADGGR |
|---|---|---|
| Marca | Texas Instruments | Texas Instruments |
| Categoría | Interface ICs | Interface ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $4,10 | $2,95 |
| Función | FlatLink Transmitter (LVDS Serializer) | LVDS FlatLink 21-bit transmitter (Serializer) |
| Number of Drivers | 4 (3 data + 1 clock) | 4 (3 data + 1 clock) |
| Velocidad de datos | 196 MBps (MegaBytes per second) | Up to 196 MBps (megabytes per second) |
| Parallel Inputs | 21 LVTTL data bits + 1 clock | — |
| Serial Outputs | 3 LVDS data pairs + 1 LVDS clock pair | — |
| Tensión de alimentación | 3.0 V to 3.6 V (3.3 V typical) | — |
| Supply Current (typical) | [DATA_NEEDED: ICC typical value] | — |
| LVDS Output Voltage Swing | [DATA_NEEDED: VOD differential swing] | — |
| LVTTL Input Voltage | [DATA_NEEDED: LVTTL input logic levels] | — |
| Clock Frequency Range | [DATA_NEEDED: parallel clock input range] | — |
| Propagation Delay | [DATA_NEEDED: tPLH / tPHL values] | Typical 2.5 ns |
| Temperatura de funcionamiento | 0°C to +70°C (Commercial) | — |
| Encapsulado | 48-pin TSSOP (DGG) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | 2 (1 year floor life) |
| Estado RoHS | Compliant | Compliant |
| Data Channel Compression | 21:3 (21 bits serialized over 3 differential pairs) | — |
| Rango de tensión de entrada | — | 3 V to 3.6 V (LVTTL single-ended) |
| LVDS Output Swing | — | Typical 350 mV differential |
| Number of Input Channels | — | 21 LVTTL data + 1 clock |
| Number of Output Channels | — | 3 LVDS data pairs + 1 LVDS clock pair |
| Common-Mode Range | — | 0 V to 2.4 V |
| Rango de temperatura de funcionamiento | — | 0 C to +70 C |
| Package Type | — | 48-TSSOP (DGG) |
| Lead-Free | — | Yes |
| Family | — | FlatLink |
| AEC-Q100 Qualified | — | No (use SN65LVDS84AQDGG for automotive) |