SN75LVDS84ADGG vs SN75LVDS84ADGGR Comparaison
Comparaison détaillée côte à côte de SN75LVDS84ADGG par Texas Instruments et SN75LVDS84ADGGR par Texas Instruments. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Texas Instruments
SN75LVDS84ADGG - FlatLink 21:3 LVDS Transmitter | Texas Instruments
SN75LVDS84ADGG ✓ ActifTexas Instruments
SN75LVDS84ADGGR - 21:3 FlatLink LVDS Transmitter 48-TSSOP | TI
SN75LVDS84ADGGR ✓ ActifComparaison des spécifications
| Paramètre | SN75LVDS84ADGG | SN75LVDS84ADGGR |
|---|---|---|
| Marque | Texas Instruments | Texas Instruments |
| Catégorie | Interface ICs | Interface ICs |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,10 | $2,95 |
| Fonction | FlatLink Transmitter (LVDS Serializer) | LVDS FlatLink 21-bit transmitter (Serializer) |
| Number of Drivers | 4 (3 data + 1 clock) | 4 (3 data + 1 clock) |
| Débit de données | 196 MBps (MegaBytes per second) | Up to 196 MBps (megabytes per second) |
| Parallel Inputs | 21 LVTTL data bits + 1 clock | — |
| Serial Outputs | 3 LVDS data pairs + 1 LVDS clock pair | — |
| Tension d'alimentation | 3.0 V to 3.6 V (3.3 V typical) | — |
| Supply Current (typical) | [DATA_NEEDED: ICC typical value] | — |
| LVDS Output Voltage Swing | [DATA_NEEDED: VOD differential swing] | — |
| LVTTL Input Voltage | [DATA_NEEDED: LVTTL input logic levels] | — |
| Clock Frequency Range | [DATA_NEEDED: parallel clock input range] | — |
| Propagation Delay | [DATA_NEEDED: tPLH / tPHL values] | Typical 2.5 ns |
| Température de fonctionnement | 0°C to +70°C (Commercial) | — |
| Boîtier | 48-pin TSSOP (DGG) | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | 2 (1 year floor life) |
| Statut RoHS | Compliant | Compliant |
| Data Channel Compression | 21:3 (21 bits serialized over 3 differential pairs) | — |
| Plage de tension d'entrée | — | 3 V to 3.6 V (LVTTL single-ended) |
| LVDS Output Swing | — | Typical 350 mV differential |
| Number of Input Channels | — | 21 LVTTL data + 1 clock |
| Number of Output Channels | — | 3 LVDS data pairs + 1 LVDS clock pair |
| Common-Mode Range | — | 0 V to 2.4 V |
| Plage de température de fonctionnement | — | 0 C to +70 C |
| Package Type | — | 48-TSSOP (DGG) |
| Lead-Free | — | Yes |
| Family | — | FlatLink |
| AEC-Q100 Qualified | — | No (use SN65LVDS84AQDGG for automotive) |