XC3090L-6TQG176C vs XC3090L-6TQ176C Comparación
Comparación detallada lado a lado de XC3090L-6TQG176C por Xilinx y XC3090L-6TQ176C por Xilinx. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC3090L-6TQG176C | XC3090L-6TQ176C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $63,00 | $9,95 |
| Family | XC3000L Low-Voltage Logic Cell Array | XC3000L Logic Cell Array |
| Series | XC3000L | — |
| Device | XC3090L | — |
| Speed Grade | -6 (6 ns tpd) | -6 |
| User I/O Count | 138 | — |
| Encapsulado | TQG176 (Thin Quad Gull-Wing, 176 pins) | TQFP-176 (TQ) |
| Tensión de alimentación | 3.3 V | — |
| Combinatorial Logic Delay (tpd) | 6 ns | — |
| Configuration Memory | SRAM (volatile, in-system programmable) | SRAM (volatile, requires boot PROM) |
| Temperatura de funcionamiento | Commercial (0C to +70C) | -40 C to +85 C (commercial, per TQ176 suffix) |
| Tipo de montaje | Surface Mount | — |
| Family Differentiator | Low-voltage 3.3V core vs 5.0V XC3000A | — |
| Compatible Programming Tools | Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration | — |
| Estado RoHS | unknown (legacy family, pre-dates RoHS documentation conventions) | [DATA_NEEDED: RoHS status - legacy Xilinx part, likely non-RoHS; not confirmed in provided web data] |
| Lead Free | unknown | — |
| Pinout Type | Perimeter I/O ring with user I/O and dedicated configuration pins | — |
| Logic Cells / CLBs | — | 320 CLBs (16 x 16 array) |
| Usable Gates | — | Approximately 9,000 system gates |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage | — | 3.3 V CMOS (5 V tolerant inputs per datasheet family) |
| User I/O Pins | — | 144 user I/O |
| Total Package Pins | — | 176 pins |
| Lead Pitch | — | 1.0 mm |
| Combinatorial Delay | — | 5 ns typical (-6 speed grade) |
| Flip-Flop Toggle Rate | — | 220 MHz |
| Configuration Modes | — | Serial, SelectMAP/Parallel |
| Process Technology | — | 0.8 um CMOS |