XC3090L-6TQG176C vs XC3090L-6TQ176C Comparison

Detailed side-by-side comparison of XC3090L-6TQG176C by Xilinx and XC3090L-6TQ176C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter XC3090L-6TQG176C XC3090L-6TQ176C
Brand Xilinx Xilinx
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family XC3000L Low-Voltage Logic Cell Array XC3000L Logic Cell Array
Series XC3000L —
Device XC3090L —
Speed Grade -6 (6 ns tpd) -6
User I/O Count 138 —
Package TQG176 (Thin Quad Gull-Wing, 176 pins) TQFP-176 (TQ)
Supply Voltage 3.3 V —
Combinatorial Logic Delay (tpd) 6 ns —
Configuration Memory SRAM (volatile, in-system programmable) SRAM (volatile, requires boot PROM)
Operating Temperature Commercial (0C to +70C) -40 C to +85 C (commercial, per TQ176 suffix)
Mounting Type Surface Mount —
Family Differentiator Low-voltage 3.3V core vs 5.0V XC3000A —
Compatible Programming Tools Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration —
RoHS Status unknown (legacy family, pre-dates RoHS documentation conventions) [DATA_NEEDED: RoHS status - legacy Xilinx part, likely non-RoHS; not confirmed in provided web data]
Lead Free unknown —
Pinout Type Perimeter I/O ring with user I/O and dedicated configuration pins —
Logic Cells / CLBs — 320 CLBs (16 x 16 array)
Usable Gates — Approximately 9,000 system gates
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage — 3.3 V CMOS (5 V tolerant inputs per datasheet family)
User I/O Pins — 144 user I/O
Total Package Pins — 176 pins
Lead Pitch — 1.0 mm
Combinatorial Delay — 5 ns typical (-6 speed grade)
Flip-Flop Toggle Rate — 220 MHz
Configuration Modes — Serial, SelectMAP/Parallel
Process Technology — 0.8 um CMOS

Datasheets & Resources

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