AD976BN - 16-Bit 100kSPS ADC | Analog Devices | 28-PDIP
N.º de pieza: AD976BN ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $28.5 | $28,50 |
| 10 | $25.2 | $252,00 |
| 100 | $21.75 | $2.175,00 |
| 500 | $19.1 | $9.550,00 |
| 1.000 | $17.4 | $17.400,00 |
AD976BN Descripción general
Background. A SAR ADC (successive-approximation register analog-to-digital converter) is a class of Nyquist-rate data converter that resolves one bit per internal clock cycle by comparing the sampled input against a binary-weighted internal DAC. SAR ADCs are valued for their deterministic latency, no-pipeline-delay sampling, and excellent DC linearity, making them a workhorse for industrial process control, instrumentation, and precision data acquisition. The AD976 family sits at the upper end of ADI's legacy 16-bit SAR portfolio and uses BiCMOS process technology that combines low-noise CMOS analog with bipolar drive for the internal reference and high-speed parallel bus.
Key features include 100 kSPS throughput (the AD976A variant in the same family runs at 200 kSPS), 100 mW typical power dissipation from a single +5 V analog supply, internal 2.5 V reference with external override, a high-speed parallel interface configurable as 8-bit (byte mode) or 16-bit (word mode), on-chip clock, and selectable bipolar/unipolar analog input ranges. The bipolar BiCMOS process delivers low analog input current and excellent integral non-linearity (INL), suitable for precision measurement.
Typical applications include industrial process control and instrumentation, data acquisition boards for legacy backplanes, medical instrumentation interfaces, and bench-top test equipment where deterministic SAR latency is preferred over pipelined ADCs. The single 5 V supply and parallel interface make it particularly well-suited for retrofits of older +5 V-only designs.
When designing with this part, ensure the analog input is buffered by a low-impedance, low-noise op-amp (such as the AD845 or AD797 family) because the SAR's switched-capacitor input presents a transient kick-back at every conversion cycle. Decouple AVDD and DVDD separately, and place a 10 µF tantalum in parallel with a 0.1 µF ceramic adjacent to each supply pin.
This page synthesizes current distributor pricing, drop-in 28-PDIP alternatives, application notes and PCB layout guidance not collected in any single source, so an engineer evaluating the AD976BN can make a sourcing and design decision in one pass.
Alternativas directas para AD976BN — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con AD976BN (mismo factor de forma y huella) — difiere en Architecture, Mounting Type, Resolution, Data Interface, Input Range.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
AD976ABN
✅ Sustitución directa✓ En stock
$15.5 / unidad
Ver hoja de datos →AD976ANZ
✅ Sustitución directa✓ En stock
$22.1 / unidad
Ver hoja de datos →AD976BNZ
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD976ABRZ
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD976BR
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD976BN Valores máximos y características eléctricas
| Resolución | 16 bits |
| Number of Channels | 1 |
| Architecture | SAR (Successive Approximation) |
| Throughput Rate | 100 kSPS |
| Tensión de alimentación | 5 V (single, 4.75 V min to 5.25 V max) |
| Power Dissipation | 100 mW (max) |
| Input Type | Single-ended |
| Input Range | ±10 V (bipolar) / 0 V to 4 V (unipolar) |
| Internal Reference | 2.5 V (selectable internal/external) |
| Reference Source | Internal 2.5 V or External |
| Data Interface | Parallel (8-bit byte or 16-bit word mode) |
| Integral Non-Linearity (INL) | ±2 LSB (max) |
| Encapsulado / Carcasa | 28-PDIP (skinny DIP, through-hole) |
| Temperatura de funcionamiento | -40 °C to +85 °C |
| Tipo de montaje | Through-Hole |
| Technology | BiCMOS |
Configuración de pines de AD976BN
| Pin 1 | AGND — Analog ground |
| Pin 2 | AVDD — +5 V analog supply |
| Pin 3 | REF — Reference input/output (internal 2.5 V or external override) |
| Pin 4 | IN — Analog input |
| Pin 5 | BIPOLAR — Bipolar/unipolar input range select |
| Pin 6 | CS — Chip select (active low) |
| Pin 7 | R/C — Read/Convert control |
| Pin 8 | BUSY — Output: conversion in progress |
| Pin 9 | BYTE — Byte/word mode select |
| Pin 10 | HBEN — High-byte enable |
| Pin 11 | DGND — Digital ground |
| Pin 12 | DVDD — +5 V digital supply |
| Pin 13 | D15 — Data bit 15 (MSB) |
| Pin 14 | D14 — Data bit 14 |
| Pin 15 | D13 — Data bit 13 |
| Pin 16 | D12 — Data bit 12 |
| Pin 17 | D11 — Data bit 11 |
| Pin 18 | D10 — Data bit 10 |
| Pin 19 | D9 — Data bit 9 |
| Pin 20 | D8 — Data bit 8 |
| Pin 21 | D7 — Data bit 7 |
| Pin 22 | D6 — Data bit 6 |
| Pin 23 | D5 — Data bit 5 |
| Pin 24 | D4 — Data bit 4 |
| Pin 25 | D3 — Data bit 3 |
| Pin 26 | D2 — Data bit 2 |
| Pin 27 | D1 — Data bit 1 |
| Pin 28 | D0 — Data bit 0 (LSB) |
Aplicaciones típicas
AD976BN es adecuado para 6 aplicacións: Industrial Process Control Data Acquisition, Legacy +5 V Data Acquisition Boards, Medical Instrumentation Front-Ends, Bench-Top Test and Measurement Equipment, Retrofit Upgrades for Existing Parallel-Bus Designs, Portable / Battery-Powered Data Loggers.
Industrial Process Control Data Acquisition
The AD976BN's 16-bit resolution and SAR architecture deliver deterministic latency and ±2 LSB INL that map directly onto the 4-20 mA loop and ±10 V sensor signals common in factory automation. It samples at 100 kSPS, fast enough to multiplex 4-8 process channels at 12-25 kSPS each. The single +5 V supply matches legacy PLC backplane rails, so the part drops into existing 28-PDIP analog-input cards without redesign. Compared with a pipelined ADC, SAR latency is deterministic - one fixed number of clock cycles - which simplifies control-loop math and eliminates pipeline-delay compensation in PID software.
Recomendado
Legacy +5 V Data Acquisition Boards
The AD976BN's parallel interface, single +5 V supply and 28-PDIP skinny DIP footprint make it the textbook drop-in ADC for older ISA/PCI and VME data-acquisition boards still in service across laboratory and industrial control systems. Its 16-bit resolution at 100 kSPS meets the dynamic range of legacy test fixtures without forcing a firmware rewrite for serial-interface modern ADCs. The deterministic SAR latency also avoids the pipeline-delay surprises that pipelined ADCs introduce to closed-loop control software.
Recomendado
Medical Instrumentation Front-Ends
Patient monitors and bench-top diagnostic instruments favor SAR ADCs because every conversion completes in a known, fixed number of clock cycles - critical for safety-critical measurements where pipeline delay could compromise a control loop. The AD976BN's ±10 V bipolar input range is well-matched to conditioned biomedical signals (ECG, EEG front-ends after instrumentation-amp scaling), and its 100 kSPS rate is more than sufficient for diagnostic-bandwidth sampling. The single +5 V supply simplifies medical-grade isolated power designs.
Recomendado
Bench-Top Test and Measurement Equipment
Bench multimeters, waveform recorders and laboratory data loggers benefit from the AD976BN's 16-bit DC linearity (±2 LSB INL) and 100 kSPS throughput, which combine to deliver the dynamic range needed for high-precision measurements. The parallel bus lets a microcontroller or FPGA capture samples without bit-banging a serial interface, simplifying firmware and reducing timing jitter. With a precision 2.5 V external reference (e.g. ADR03), the ADC can be calibrated for 16-bit absolute accuracy in transfer-standard calibration equipment.
Recomendado
Retrofit Upgrades for Existing Parallel-Bus Designs
When a parallel-bus +5 V board needs a refresh but the surrounding FPGA, MCU, or backplane cannot be re-spun to add a serial SPI ADC, the AD976BN is the right drop-in. Its 28-PDIP skinny DIP footprint fits existing through-hole pads; its 16-bit parallel data bus can be read as two bytes or one word; its single +5 V supply needs no extra LDO. The 'BN' grade at 100 kSPS or the 'A-grade' at 200 kSPS give designers headroom to double throughput without changing firmware, simply by swapping the ADC MPN on the BOM.
Recomendado
Portable / Battery-Powered Data Loggers
Battery-powered portable data loggers benefit from the AD976BN's modest 100 mW dissipation from a single +5 V rail - low enough to be powered from a 5 V LDO fed by a USB-C or 4-cell battery pack. The SAR architecture avoids the high transient currents that pipeline ADCs draw during calibration, simplifying decoupling. Combined with a low-power microcontroller reading the parallel bus in burst mode, the system can achieve hours of continuous logging per battery charge.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para AD976BN — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | AD976ABN | AD976ANZ | AD976BNZ | AD976ABRZ | AD976BR |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 28-PDIP (skinny DIP) | 28-PDIP - same | 28-PDIP - same | 28-PDIP - same | 28-SOIC - different footprint | 28-SOIC - different footprint |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits | 16 bits | 16 bits |
| Throughput | 100 kSPS | 200 kSPS (+100%) | 200 kSPS (+100%) | 100 kSPS (same) | 200 kSPS (+100%) | 100 kSPS (same) |
| Supply Voltage | 5 V single | 5 V single | 5 V single | 5 V single | 5 V single | 5 V single |
| Internal Reference | 2.5 V | 2.5 V | 2.5 V | 2.5 V | 2.5 V | 2.5 V |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR |
| Power Dissipation (max) | 100 mW | 100 mW | 100 mW | 100 mW | 100 mW | 100 mW |
| Input Range | ±10 V bipolar / 0-4 V unipolar | ±10 V / 0-4 V | ±10 V / 0-4 V | ±10 V / 0-4 V | ±10 V / 0-4 V | ±10 V / 0-4 V |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C |
Diferenciadores clave
- Single +5 V supply with internal reference eliminates external LDO/reference BOM (frente a AD976ABRZ (28-SOIC variant))
- Skinny 28-PDIP through-hole package fits legacy backplanes and prototype boards (frente a AD976ABRZ (28-SOIC surface-mount))
- SAR deterministic latency, no pipeline delay (frente a Modern pipelined 16-bit ADCs (e.g. AD7621 family))
Notas de diseño
Decouple AVDD and DVDD separately with a 10 µF tantalum (or low-ESR aluminum) in parallel with a 0.1 µF ceramic placed within 5 mm of each supply pin. Tie AGND and DGND together at a single star-point near the ADC to avoid ground bounce from the parallel data bus corrupting analog measurements. Source: ADI AD976/AD976A datasheet analog-portion section.
The AD976BN's switched-capacitor SAR input presents transient kick-back currents on every conversion cycle. Drive it with a low-impedance, low-noise op-amp such as the AD797 or AD845 configured for unity gain - a generic 10 kΩ source impedance will degrade INL. If the source is high impedance (e.g. a strain gauge), add an RC anti-alias filter between the buffer and the ADC input.
Route the 16-bit parallel data bus away from the analog input trace and AVDD pin. Place the AD976BN on a single ground plane and use a guard trace (tied to AGND) around the IN pin to minimize digital-to-analog crosstalk. Source: ADI AD976/AD976A datasheet, layout considerations section.
Because the parallel bus drives multiple outputs simultaneously on every conversion, keep trace lengths matched (within 25 mm) to avoid skew on the high-byte/low-byte capture. Place a 100 Ω series resistor near each D0-D15 output if the bus runs more than 50 mm to the host FPGA or microcontroller to damp ringing.
Información de cumplimiento
MSL level and RoHS/lead-free status for the 28-PDIP 'BN' variant were not present in the verified web data; refer to the Analog Devices AD976/AD976A datasheet ordering-information table for the exact finish code. AEC-Q100 is not applicable - this is an industrial/consumer-grade ADC, not automotive-qualified.
