ADP225ACPZ - Dual 300mA Adj LDO, Low Noise, High PSRR | ADI
N.º de pieza: ADP225ACPZ ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $2.3 | $2,30 |
| 10 | $2.06 | $20,60 |
| 100 | $1.84 | $184,00 |
| 500 | $1.66 | $830,00 |
| 1.000 | $1.45 | $1.450,00 |
| 3.000 | $1.29 | $3.870,00 |
ADP225ACPZ Descripción general
An LDO (low-dropout) linear regulator is a class of voltage regulator whose category (LM-IC) maintains a stable, accurate rail even when VIN approaches VLOOOW - i.e. the regulator continues to regulate with only a few hundred millivolts of headroom. In the broader power-tree hierarchy, an LDO sits downstream of switching DC-DC converters (which provide bulk step-down) and upstream of noise-sensitive loads; LDOs trade efficiency for clean output because no switching noise reaches the load.
Key features include high power-supply rejection ratio (PSRR) for downstream ripple attenuation, low output noise suitable for RF and audio rails, integrated quick-output discharge (QOD) transistors that actively pull each output to ground when disabled, and stable operation with only 1 µF, ±30% ceramic output capacitors. The two channels are independently enabled and share a common input.
The ADP225ACPZ is fabricated on a BiCMOS process that combines CMOS control logic with bipolar pass elements, achieving both low quiescent current and excellent transient response. The QOD MOSFETs prevent output voltage drift into the disabled state, which is critical for power-sequenced loads such as RF transceivers, FPGAs, and image sensors.
Typical applications include portable and battery-powered devices (smartphones, wearables, tablets), wireless handsets and RF transceivers, image sensor and camera-module rails, FPGA/ASIC I/O and core supplies in low-voltage domains, and any space-constrained board that needs two clean rails from a single small package.
When designing with this part, ensure the input supply has sufficient bulk capacitance to handle the simultaneous turn-on of both outputs and that the 1 µF minimum output capacitance requirement is met across temperature and DC bias. The exposed pad must be soldered to a sufficient copper pour for thermal dissipation.
Alternativas directas para ADP225ACPZ — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
ADP223ACPZ-R7
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADP222ACPZ-R7
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADP224ACPZ-R7
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADP225ACPZ-R7
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
ADP225ACPZ Valores máximos y características eléctricas
| Número de salidas | 2 (dual) |
| Tipo de salida | Adjustable |
| Rango de tensión de salida | 0.5 V to 5.0 V (per channel) |
| Rango de tensión de entrada | 2.5 V to 5.5 V |
| Corriente de salida máxima | 300 mA per channel |
| Dropout Voltage (typical) | 170 mV at 300 mA |
| Output Capacitor | 1 µF ceramic minimum (±30%) |
| Quick Output Discharge (QOD) | Yes (integrated, both channels) |
| Rango de temperatura de funcionamiento | -40 °C to +125 °C (junction) |
| Encapsulado | 8-LFCSP-UD (2 mm × 2 mm) |
| Tipo de montaje | Surface Mount |
| Estado RoHS | Compliant |
Configuración de pines de ADP225ACPZ
| Pin 1 | OUT1 — Channel 1 regulated output voltage |
| Pin 2 | FB1 — Channel 1 feedback (to external resistor divider) |
| Pin 3 | GND — Ground reference |
| Pin 4 | EN2 — Channel 2 enable (active high) |
| Pin 5 | IN — Shared input supply voltage |
| Pin 6 | OUT2 — Channel 2 regulated output voltage |
| Pin 7 | FB2 — Channel 2 feedback (to external resistor divider) |
| Pin 8 | EN1 — Channel 1 enable (active high) |
Aplicaciones típicas
ADP225ACPZ es adecuado para 6 aplicacións: Smartphone / Handheld RF Transceiver Rails, Wearable / Health-Monitoring Device Power, Image Sensor / Camera Module Power, FPGA / ASIC I/O and Core Supplies, Bluetooth / Wi-Fi Module Power, Portable Medical Sensor / Diagnostic Device.
Smartphone / Handheld RF Transceiver Rails
The ADP225ACPZ powers the dual analog rails of a smartphone RF transceiver, typically a 2.8 V PA supply and a 1.8 V VCO/synthesizer rail from a 3.7 V Li-ion battery. Its 170 mV typical dropout at 300 mA leaves sufficient headroom across battery discharge, while the integrated quick-output discharge on both channels prevents the VCO rail from drifting during sleep transitions - critical for phase-noise performance. The 1 µF ceramic-capacitor stability requirement enables a tiny 2 mm × 2 mm total solution footprint, ideal for handset mainboards. Engineers cite a companion IC (the RF transceiver) as the load, and an upstream buck converter as the typical VIN source.
Recomendado
Wearable / Health-Monitoring Device Power
Wearable fitness bands and continuous-health-monitoring patches require two clean rails from a tiny footprint, exactly what this part delivers. The ADP225ACPZ generates a 1.8 V digital-core rail and a 3.0 V analog-sensor rail from a 3.7 V Li-ion cell, with both rails independently enabled so the MCU can power-gate the analog side during sleep. The quick-output discharge ensures the bio-sensor rail falls predictably between samples, preventing residual charge from biasing the next measurement. Total solution size stays under 15 mm² because the 2 mm × 2 mm LFCSP requires only 1 µF ceramic caps. The -40 °C to +125 °C junction range covers skin-temperature operation.
Recomendado
Image Sensor / Camera Module Power
CMOS image sensors in smartphone and security-camera modules need two rails: an analog AVDD rail (typically 2.8 V) and a digital DVDD rail (typically 1.2 V or 1.5 V), with strict power-sequencing to avoid latch-up. The ADP225ACPZ handles both rails from a 3.7 V battery with independent enable pins and QOD transistors on each output, allowing the camera ISP to sequence AVDD before DVDD and discharge both cleanly on power-down. The high PSRR attenuates ripple from upstream switching converters that share the same battery rail, protecting image-sensor dynamic range. The 300 mA per-channel rating supports even large 1/1.3-inch sensors at high frame rates.
Recomendado
FPGA / ASIC I/O and Core Supplies
Low-voltage FPGAs and ASICs in industrial controllers require a low-voltage core rail (e.g., 1.0 V) and a higher I/O rail (e.g., 1.8 V or 3.3 V) from a single 5 V or 3.3 V bus. The ADP225ACPZ powers both rails with high PSRR, suppressing switching-converter ripple on the core supply that would otherwise inject noise into SERDES links. Each rail can be set independently via external resistor dividers, matching the exact voltage requirements of the target FPGA. Independent enable pins support power-up sequencing mandated by most modern FPGA datasheets, and QOD transistors ensure controlled shutdown when the FPGA enters a reset state.
Recomendado
Bluetooth / Wi-Fi Module Power
Bluetooth Low Energy and Wi-Fi modules need a clean 1.8 V or 3.3 V digital rail and a separate RF supply rail, often at 1.5 V for the radio core. The ADP225ACPZ provides both from a USB or Li-ion input, with the high PSRR attenuating the switching noise from the module's internal DC-DC converter that shares the same PCB. The 300 mA per-channel rating supports peak TX current, while the quick-output discharge prevents the RF rail from lingering when the radio enters sleep, reducing quiescent power. The 2 mm × 2 mm footprint fits underneath the module or on a tightly packed IoT sensor board.
Recomendado
Portable Medical Sensor / Diagnostic Device
Handheld glucose meters, pulse oximeters, and point-of-care diagnostic devices require two isolated, low-noise rails: one for the analog front-end and one for the digital MCU and ADC. The ADP225ACPZ powers these rails from a 2-cell alkaline or Li-ion battery, with low quiescent current extending battery life between charges. The high PSRR attenuates noise from display drivers and wireless modules that share the same battery, protecting ADC measurement accuracy. The -40 °C to +125 °C junction range supports both refrigerated-stored and skin-contact operating conditions, and the small footprint fits inside a pen-sized enclosure.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para ADP225ACPZ — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | ADP223ACPZ-R7 | ADP222ACPZ-R7 | ADP224ACPZ-R7 | ADP225ACPZ-R7 |
|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 8-LFCSP-UD (2x2) | 8-LFCSP-UD (2x2) - same | 8-LFCSP-UD (2x2) - same | 8-LFCSP-UD (2x2) - same | 8-LFCSP-UD (2x2) - same |
| Number of Outputs | 2 (dual) | 2 (dual) | 2 (dual) | 2 (dual) | 2 (dual) |
| Output Type | Adjustable (0.5 V to 5.0 V) | Adjustable | Fixed (factory-set) | Fixed (factory-set) | Adjustable |
| Maximum Output Current | 300 mA per channel | 300 mA per channel | 300 mA per channel | 300 mA per channel | 300 mA per channel |
| Quick Output Discharge (QOD) | Yes (both channels) | Yes | No | No | Yes |
| Input Voltage Range | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
| Dropout (typ @ 300 mA) | 170 mV | 170 mV | 170 mV | 170 mV | 170 mV |
Diferenciadores clave
- Pin-compatible adjustable vs fixed dual LDO with same footprint (frente a ADP222ACPZ-R7)
- Integrated QOD on both channels (frente a ADP224ACPZ-R7)
- Same family, same footprint, same 1 µF ceramic stability (frente a ADP223ACPZ-R7)
Notas de diseño
Estimated: at VIN = 5.0 V, VOUT1 = 3.3 V and VOUT2 = 1.8 V, each drawing 200 mA, per-channel dissipation is (5.0 − 3.3) × 0.2 = 0.34 W and (5.0 − 1.8) × 0.2 = 0.64 W respectively, total ~0.98 W. The 2 mm × 2 mm LFCSP-UD has a typical θJA of ~70 °C/W on a 4-layer 1 oz JEDEC test board, which gives a junction rise of roughly 70 °C above ambient. With 85 °C ambient, the die reaches ~155 °C, exceeding the 125 °C rating. To stay within spec at high VIN-VOUT deltas, derate load to ~150 mA per channel or increase PCB copper area.
Place both 1 µF ceramic input and output capacitors as close as possible to the IN, OUT1, OUT2, and GND pins on the same layer as the IC - avoid vias between the cap and the pin. The exposed pad must be soldered to a continuous ground plane with thermal vias (5–9 vias in a 3×3 array recommended) to keep θJA within the datasheet spec. Per the ADI datasheet, both 1 µF output caps must retain their capacitance (≥0.7 µF effective including DC bias derating) across temperature for stability.
Do not omit the 1 µF output capacitors - the part is NOT stable without them. Use X5R or X7R ceramic types with 10 V or higher voltage rating so the capacitance does not derate below 0.7 µF at the programmed output. Do not operate EN1 / EN2 with a slow RC time constant (above 1 ms); the internal pull-down requires a clean logic-level signal. Do not exceed the absolute maximum IN rating of 6 V even during load-dump transients in 5 V systems.
Route feedback traces (FB1, FB2) away from noisy signals and away from the switching nodes of any upstream DC-DC converter; the high-impedance feedback node is sensitive to capacitive coupling. Keep the feedback resistor divider close to the FB pin with the ground end of the divider tied to a clean ground reference, not through a long trace. Per the ADI datasheet typical application circuit, use 1% tolerance resistors for the divider to maintain output accuracy within ±2%.
Información de cumplimiento
RoHS compliant per distributor product pages (DigiKey, Mouser). Not AEC-Q100 qualified - this part targets consumer/commercial portable and wireless designs. Halogen-free status not stated in provided data; set to unknown.
