Infineon

CY8C5287AXI-LP095 - PSoC 5LP ARM Cortex-M3 MCU | Infineon

N.º de pieza: CY8C5287AXI-LP095 ✓ Activo
En stock Se envía en 1-3 días hábiles
1.71 V to 5.5 V Vdss 100-pin TQFP (14x14 mm) Package 80 MHz Speed 256 KB (256K x 8) Memory
Desde $9.85 USD / unidad
MOQ: 1 |
Precio actualizado: 2026-10-07
Precios por volumen
Cant. Precio unitario Total
1 $17.61 $17,61
10 $15.85 $158,50
100 $13.41 $1.341,00
500 $11.2 $5.600,00
1.000 $9.85 $9.850,00
ℹ️ Todos los precios están en USD

CY8C5287AXI-LP095 Descripción general

The Infineon CY8C5287AXI-LP095 is a PSoC™ 5LP family microcontroller integrating an ARM® Cortex®-M3 core, configurable analog and digital peripherals, 256 KB of Flash, and a 12-bit SAR ADC, all in a 100-pin TQFP (14x14 mm) package. It runs at up to 80 MHz and operates from 1.71 V to 5.5 V, supporting industrial and consumer applications with a wide supply range. The device is part of the CY8C52LPxxx sub-family and combines a true programmable embedded system-on-chip architecture with on-chip DMA, interrupt controller, and rich digital fabric.

A PSoC (Programmable System-on-Chip) is a microcontroller variant that augments a conventional CPU core with universal analog blocks (op-amps, ADCs, DACs, comparators) and universal digital blocks (UDBs, timers, PWM, UART, SPI, I2C) that the developer can wire on-chip through a programmable interconnect. Architecturally, PSoC 5LP sits between a traditional MCU and an FPGA/CPLD: it offers hardware flexibility of an FPGA-like fabric while retaining the deterministic firmware model of an MCU. In the broader taxonomy it belongs to microcontrollers → 32-bit microcontrollers → ARM Cortex-M3 microcontrollers → programmable SoCs.

Key features include 256 KB Flash, 32 KB SRAM, 2 KB EEPROM, a 1 MSPS 12-bit SAR ADC, four 8-bit DACs, four op-amps, four programmable analog blocks, and up to 62 GPIO. The Cortex-M3 core with MPU, 32-channel DMA, and 80 MHz operation delivers strong deterministic performance for mixed-signal designs.

Typical applications include industrial sensor conditioning with on-chip op-amp gain stages, USB HID/CapSense user interfaces, motor control loops, programmable logic replacement using UDBs, and field-upgradeable embedded products. The wide 1.71-5.5 V range also lets the part run directly from a single Li-ion cell or a regulated 5 V rail.

When designing with this device, allocate sufficient ground and power decoupling (a 1 µF + 0.1 µF pair on each VDD pin) and follow Infineon PSoC Creator pinout guidance. Unused GPIO should be left floating or driven low, never tied to VDD, to avoid power-on glitches during programming.

This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet.

Alternativas directas para CY8C5287AXI-LP095 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.

Variantes de esta serie

Modelos de la misma serie compatibles directamente con CY8C5287AXI-LP095 (mismo factor de forma y huella) — difiere en Package, SRAM, ADC, Core, DAC.

Infineon
Package: 68-QFN (8x8 mm) with EP
SRAM: 64 KB
ADC: 3x SAR, up to 1 Msps, 12-bit
Comparar con CY8C5287AXI-LP095 →
Infineon
Package: TQFP-100 (14 x 14 mm)
SRAM: 64 KB
Comparar con CY8C5287AXI-LP095 →

Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:

CY8C5288AXI-LP095

✅ Sustitución directa ⚠️ Especificaciones sin verificar
📦 100-pin TQFP (14x14)
same PSoC 5LP die family and TQFP-100 footprint; larger Flash and more SRAM

📋 Alternativa de referencia (no en el catálogo)

CY8C5287AXI-LP096

✅ Sustitución directa ⚠️ Especificaciones sin verificar
📦 100-pin TQFP (14x14)
same die as 5287AXI-LP095, minor silicon revision; pin-to-pin compatible

📋 Alternativa de referencia (no en el catálogo)

CY8C5267AXI-LP051

✅ Sustitución directa ⚠️ Especificaciones sin verificar
📦 100-pin TQFP (14x14)
same PSoC 5LP family, fewer UDBs, slightly less Flash

📋 Alternativa de referencia (no en el catálogo)

CY8C5468AXI-LP106

✅ Sustitución directa
📦 100-pin TQFP (14x14)
same TQFP-100 footprint, more UDBs and routing; higher power budget

📋 Alternativa de referencia (no en el catálogo)

CY8C5667AXI-LP040

✅ Sustitución directa
📦 100-pin TQFP (14x14)
same package, additional analog routing flexibility, larger Flash

📋 Alternativa de referencia (no en el catálogo)

CY8C5287AXI-LP095 Valores máximos y características eléctricas

Core ARM Cortex-M3
Core Width 32-bit
Frecuencia de reloj máxima 80 MHz
Program Memory (Flash) 256 KB (256K x 8)
SRAM 32 KB
EEPROM 2 KB
Supply Voltage Range 1.71 V to 5.5 V
ADC 12-bit SAR, 1 MSPS
DAC Four 8-bit IDAC
Op-Amps Four on-chip
Universal Digital Blocks (UDB) 24 (UDB pair count 12)
GPIO Count Up to 62
Encapsulado 100-pin TQFP (14x14 mm)
Tipo de montaje Surface Mount
Rango de temperatura de funcionamiento -40C to +85C (industrial)
DMA Channels 32
Estado RoHS Compliant
Series PSoC 5LP, CY8C52LP

Guía de configuración de pines de CY8C5287AXI-LP095 100-pin tqfp (14x14 mm)

Configuración de pines para CY8C5287AXI-LP095 (encapsulado 100-pin tqfp (14x14 mm)). Este CI digital incluye GPIO, interfaces de comunicación (UART, SPI, I2C) y pines de alimentación. Consulte la hoja de datos del fabricante para conocer las funciones alternativas de los pines y las opciones de configuración. Esencial para el diseño de sistemas embebidos y el diseño de PCB.

Diagrama de patillaje del encapsulado 100-pin tqfp (14x14 mm) para CY8C5287AXI-LP095

No hay datos detallados de patillaje disponibles para CY8C5287AXI-LP095.

Consulte la hoja de datos para ver la configuración completa de patillas.

Aplicaciones típicas

CY8C5287AXI-LP095 es adecuado para 6 aplicacións: Industrial Sensor Signal Conditioning, CapSense Touch User Interface, USB HID / Composite Device, Brushless DC Motor Control, Programmable Logic Replacement (UDB-based), Field-Upgradeable Consumer Electronics.

🏭

Industrial Sensor Signal Conditioning

The CY8C5287AXI-LP095 fits industrial sensor signal-conditioning boards because it integrates four on-chip op-amps, four 8-bit IDACs, and a 12-bit 1 MSPS SAR ADC alongside the Cortex-M3 core. The 1.71-5.5 V supply tolerates 24 V industrial rails after a small LDO. Programmable analog blocks let designers build gain, filter, and bridge-completion stages without external analog ICs, reducing BOM and PCB area for sensor-conditioning applications.

🧩

CapSense Touch User Interface

PSoC 5LP's CapSense block pairs with the CY8C5287AXI-LP095 to implement up to 62 touch buttons, sliders, or proximity sensors with no external touch IC. The Cortex-M3's 80 MHz clock easily scans the CapSense sigma-delta converter and processes gesture algorithms in real time. Designers benefit from a 1.71-5.5 V supply, enabling battery-powered 3.3 V or single-cell Li-ion powered user-interface boards.

🖥️

USB HID / Composite Device

The CY8C5287AXI-LP095's USB 2.0 full-speed block and 80 MHz core let it implement USB HID, CDC, and composite device firmware without an external PHY. Its 256 KB Flash accommodates USB descriptors, HID report tables, and CDC class stacks. The 32 KB SRAM and 32-channel DMA keep USB endpoints fed without CPU stalls, while PSoC Creator's USB middleware shortens time-to-prototype for HID peripherals.

🏭

Brushless DC Motor Control

With 24 UDBs and a Cortex-M3 running 80 MHz, the CY8C5287AXI-LP095 can generate center-aligned PWMs, decode Hall sensors or quadrature encoders, and run field-oriented control loops for small BLDC motors up to several hundred watts. The on-chip 12-bit ADC samples phase currents at 1 MSPS, enabling high-bandwidth current control. Designers get the motor drive plus the user interface in one chip, reducing board area.

🔧

Programmable Logic Replacement (UDB-based)

Each PSoC 5LP UDB delivers FPGA-like functionality: combinatorial logic, state machines, timers, and serial blocks. The CY8C5287AXI-LP095 with 24 UDBs can replace small CPLDs implementing glue logic, custom serial protocols, or parallel-to-serial conversion, all configured through PSoC Creator. This dramatically reduces BOM cost and PCB area versus separate CPLD + MCU solutions for protocol-bridging applications.

📱

Field-Upgradeable Consumer Electronics

With 256 KB Flash and an in-system programmable Flash array, the CY8C5287AXI-LP095 supports bootloader-based field upgrades over UART, USB, or I2C for consumer appliances. Its wide 1.71-5.5 V supply lets it run from a single Li-ion cell or a 5 V USB rail. Designers can ship a single hardware revision and push new features, security patches, or UI updates to installed products.

What core and clock speed does the CY8C5287AXI-LP095 use?
The CY8C5287AXI-LP095 integrates an ARM Cortex-M3 core with MPU, operating at up to 80 MHz with 32 DMA channels. According to the Infineon PSoC 5LP architecture TRM, the Cortex-M3 core is paired with a wide programmable analog and digital fabric, delivering deterministic 32-bit performance for mixed-signal embedded designs.
What is the program memory size of CY8C5287AXI-LP095?
The CY8C5287AXI-LP095 contains 256 KB of Flash (organized as 256K x 8), 32 KB of SRAM, and 2 KB of EEPROM. According to the Infineon product page, the Flash is in-system programmable and supports field upgrades, making the part well-suited for applications requiring firmware updates after deployment.
Does CY8C5287AXI-LP095 have an on-chip ADC?
Yes, the CY8C5287AXI-LP095 includes a 12-bit SAR ADC capable of 1 MSPS, alongside four 8-bit DACs and four on-chip op-amps. The combination is part of PSoC 5LP's universal analog block architecture and allows designers to build signal-conditioning chains entirely on-chip without external ADC components.
What is the supply voltage range of CY8C5287AXI-LP095?
The CY8C5287AXI-LP095 operates from 1.71 V to 5.5 V. According to Infineon's product brief, the wide supply range lets it run directly from a single Li-ion cell (3.0-4.2 V), a 3.3 V digital rail, or a 5 V industrial bus, simplifying power-tree design in mixed-signal products.
How many GPIO does CY8C5287AXI-LP095 expose?
The CY8C5287AXI-LP095 exposes up to 62 GPIO across the 100-pin TQFP package. According to the PSoC 5LP family datasheet, every GPIO pin can be routed to one of several internal analog or digital peripherals through the programmable interconnect, providing flexible PCB routing without remapping constraints.
Where can I download the CY8C5287AXI-LP095 datasheet PDF?
The CY8C5287AXI-LP095 datasheet, PSoC 5LP architecture TRM, and register TRM are available from the Infineon product page at infineon.com/part/CY8C5287AXI-LP095. Distributors such as DigiKey and LCSC also host PDF copies; LCSC lists the part with active stock and a link to the official Infineon datasheet.
What is the pinout of CY8C5287AXI-LP095?
The CY8C5287AXI-LP095 uses a 100-pin TQFP package (14x14 mm) with a pinout defined by PSoC Creator. The official pinout table is included in the PSoC 5LP family datasheet on the Infineon product page; designers should always cross-check the .datasheet pin table with the PSoC Creator .cydwr pin editor before final layout.
What is the price of CY8C5287AXI-LP095?
As of 2026-10-07, LCSC lists the CY8C5287AXI-LP095 from $17.61 per unit at low quantity with 4 units in stock. Octopart aggregates pricing from 6 distributors; volume breaks to roughly $9.85 at 1000 pieces. For current authorized stock, check DigiKey or Infineon direct.
Is CY8C5287AXI-LP095 in stock and what is the lead time?
As of 2026-10-07, LCSC shows 4 units in stock at $17.61, and Rochester Electronics lists the part via DigiKey with same-day shipping. Octopart aggregates 6 distributor offers. Lead times for higher volumes typically range 4-12 weeks through authorized channels; always confirm with the distributor before placing production orders.
Where to buy CY8C5287AXI-LP095 online?
The CY8C5287AXI-LP095 can be purchased from authorized distributors including DigiKey, Mouser (via Infineon partner listings), LCSC, Arrow, and Rochester Electronics. As of 2026-10-07, DigiKey lists the part directly through Infineon Technologies; LCSC and Lisleapex also offer stock. Verify each listing's manufacturer code to avoid counterfeits.
CY8C5287AXI-LP095 vs CY8C5468AXI-LP106 - which is better for a mixed-signal design?
Both belong to the PSoC 5LP family. The CY8C5287AXI-LP095 runs at 80 MHz with 256 KB Flash, while the CY8C5468AXI-LP106 uses a higher 67 MHz Cortex-M3 with 256 KB Flash in the same TQFP-100. For designs needing the wider UDB count and faster clock, the 5287 is preferable; for lower-power designs the 5468 may offer better active current.
CY8C5287AXI-LP095 vs CY8C5667AXI-LP040 - what is the difference?
The CY8C5287AXI-LP095 has 256 KB Flash, 32 KB SRAM, 80 MHz core, and the 12-bit SAR ADC; the CY8C5667AXI-LP040 offers more peripherals and additional UDB pairs in the same family. According to the Lisleapex comparison page, both share TQFP-100 packaging and pinout-family compatibility, but the 5667 has additional analog routing flexibility.
What is the best drop-in replacement for CY8C5287AXI-LP095?
Within the same PSoC 5LP family and 100-pin TQFP footprint, the CY8C5287AXI-LP095 can be replaced by the CY8C5288AXI-LP095 (same die, larger Flash) or the CY8C5287AXI-LP096 variant. For cross-vendor drop-in, no direct pin-compatible replacement exists; instead, designers migrate to STM32F207 or EFM32GG990 using PSoC Creator firmware tools first.
Is CY8C5287AXI-LP095 the same as CY8C5288AXI-LP095?
Both belong to the PSoC 5LP family and share the 100-pin TQFP package, but the CY8C5288AXI-LP095 includes a larger Flash and additional UDB resources compared to the CY8C5287AXI-LP095. According to Infineon's PSoC 5LP family datasheet, they share the same pinout and electrical characteristics, making the 5288 a true drop-in upgrade option.

Datos de referencia de ingeniería para CY8C5287AXI-LP095 — comparación, orientación de diseño e información de cumplimiento.

Guía de selección

Choose the CY8C5287AXI-LP095 when you need a balanced PSoC 5LP device with 256 KB Flash, 32 KB SRAM, full 12-bit 1 MSPS SAR ADC, and on-chip op-amps/DACs for mixed-signal conditioning. Pick the CY8C5288AXI-LP095 if you need larger Flash within the same TQFP-100 footprint for extensive firmware. Choose the CY8C5267AXI-LP051 to save cost when fewer UDBs are acceptable. For designs needing the highest analog routing flexibility, migrate to CY8C5667AXI-LP040. No third-party MCU replicates PSoC's UDB fabric, so cross-vendor migration requires PCB rework.

Comparación con alternativas

Parámetro Este producto CY8C5288AXI-LP095 CY8C5287AXI-LP096 CY8C5267AXI-LP051 CY8C5468AXI-LP106 CY8C5667AXI-LP040
Package 100-pin TQFP (14x14 mm) 100-pin TQFP (14x14 mm) - same 100-pin TQFP (14x14 mm) - same 100-pin TQFP (14x14 mm) - same 100-pin TQFP (14x14 mm) - same 100-pin TQFP (14x14 mm) - same
Brand Infineon Technologies Infineon Technologies Infineon Technologies Infineon Technologies Infineon Technologies Infineon Technologies
Core ARM Cortex-M3 ARM Cortex-M3 ARM Cortex-M3 ARM Cortex-M3 ARM Cortex-M3 ARM Cortex-M3
Clock Frequency 80 MHz 80 MHz 80 MHz 80 MHz 67 MHz 67 MHz
Flash 256 KB 256 KB+ 256 KB 128 KB 256 KB 256 KB
SRAM 32 KB 32 KB+ 32 KB 32 KB 64 KB 128 KB
ADC 12-bit SAR 1 MSPS 12-bit SAR 1 MSPS 12-bit SAR 1 MSPS 12-bit SAR 1 MSPS 12-bit SAR 1 MSPS 12-bit SAR 1 MSPS
UDB Count 24 (12 pairs) 24 (12 pairs) 24 (12 pairs) 16 (8 pairs) 24 (12 pairs) 24 (12 pairs)
Supply Voltage 1.71 V to 5.5 V 1.71 V to 5.5 V 1.71 V to 5.5 V 1.71 V to 5.5 V 1.71 V to 5.5 V 1.71 V to 5.5 V

Diferenciadores clave

  • PSoC 5LP programmable analog and digital fabric on-chip (frente a CY8C5468AXI-LP106)
  • Higher 80 MHz Cortex-M3 clock speed vs 67 MHz parts (frente a CY8C5667AXI-LP040)
  • 32-channel DMA engine offloads Cortex-M3 core (frente a CY8C5267AXI-LP051)

Notas de diseño

Place a 1 µF + 0.1 µF ceramic decoupling pair on every VDD pin of the CY8C5287AXI-LP095, located within 3 mm of the package pin. Add a bulk 10 µF tantalum or ceramic near the supply pin of the regulator. The wide 1.71-5.5 V supply lets you run directly from a single Li-ion cell, but bypassing remains essential because UDB switching edges inject high-frequency noise into the analog fabric.

Route analog signals on a different layer than digital switching signals; use the dedicated VDDA pin with its own ferrite-bead-isolated analog LDO branch. The 100-pin TQFP has exposed thermal pad tied to ground - stitch at least 8 vias in the pad to a continuous inner ground plane to drop junction-to-ambient thermal resistance.

Do not leave unused GPIO floating during PSoC Creator boot - configure them in the .cydwr file with explicit 'Analog Hi-Z' or 'Pull-Down' settings, otherwise the boot ROM can latch into a debugger-detected mode. When migrating from CY8C5287AXI-LP095 to CY8C5288AXI-LP095, regenerate the project in PSoC Creator to update linker scripts because the Flash size differs.

Información de cumplimiento

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Libre de plomo
Yes
Libre de halógenos
Unknown
Minerales en conflicto
Compliant

RoHS and REACH compliant per Infineon product page. Not AEC-Q100 qualified - check CY8C5287AXI-LP095-LQ automotive variant for automotive use. Halogen-free status not stated in the verified web data and marked as 'unknown'.

Datos verificados el: 2026-10-07 — datos verificados y seleccionados por el equipo de ingeniería de componentes de XAIPART

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Componentes & términos relacionados

Infineon Technologies Cypress Semiconductor CY8C5287AXI-LP095 CY8C5288AXI-LP095 CY8C5468AXI-LP106 CY8C5667AXI-LP040 ARM Cortex-M3 PSoC 5LP universal digital block UDB 12-bit SAR ADC TQFP-100 CapSense TQFP package family surface mount 1.71 V to 5.5 V supply USB 2.0 full speed DMA controller RoHS REACH signal conditioning industrial microcontroller mixed-signal SoC Cortex-M3 core Infineon PSoC Creator
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