CY8C5287AXI-LP095 - PSoC 5LP ARM Cortex-M3 MCU | Infineon
部品番号: CY8C5287AXI-LP095 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $17.61 | $17.61 |
| 10 | $15.85 | $158.50 |
| 100 | $13.41 | $1,341.00 |
| 500 | $11.2 | $5,600.00 |
| 1,000 | $9.85 | $9,850.00 |
CY8C5287AXI-LP095 概要
A PSoC (Programmable System-on-Chip) is a microcontroller variant that augments a conventional CPU core with universal analog blocks (op-amps, ADCs, DACs, comparators) and universal digital blocks (UDBs, timers, PWM, UART, SPI, I2C) that the developer can wire on-chip through a programmable interconnect. Architecturally, PSoC 5LP sits between a traditional MCU and an FPGA/CPLD: it offers hardware flexibility of an FPGA-like fabric while retaining the deterministic firmware model of an MCU. In the broader taxonomy it belongs to microcontrollers → 32-bit microcontrollers → ARM Cortex-M3 microcontrollers → programmable SoCs.
Key features include 256 KB Flash, 32 KB SRAM, 2 KB EEPROM, a 1 MSPS 12-bit SAR ADC, four 8-bit DACs, four op-amps, four programmable analog blocks, and up to 62 GPIO. The Cortex-M3 core with MPU, 32-channel DMA, and 80 MHz operation delivers strong deterministic performance for mixed-signal designs.
Typical applications include industrial sensor conditioning with on-chip op-amp gain stages, USB HID/CapSense user interfaces, motor control loops, programmable logic replacement using UDBs, and field-upgradeable embedded products. The wide 1.71-5.5 V range also lets the part run directly from a single Li-ion cell or a regulated 5 V rail.
When designing with this device, allocate sufficient ground and power decoupling (a 1 µF + 0.1 µF pair on each VDD pin) and follow Infineon PSoC Creator pinout guidance. Unused GPIO should be left floating or driven low, never tied to VDD, to avoid power-on glitches during programming.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet.
ドロップイン代替品: CY8C5287AXI-LP095 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: CY8C5287AXI-LP095 （同一形状・フットプリント） — 相違点: Package, SRAM, ADC, Core, DAC.
クイック比較ツール — 並列比較する代替部品を選択:
CY8C5288AXI-LP095
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
CY8C5287AXI-LP096
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
CY8C5267AXI-LP051
✅ ドロップイン ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
CY8C5468AXI-LP106
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY8C5667AXI-LP040
✅ ドロップイン📋 参考代替品（カタログ未掲載）
CY8C5287AXI-LP095 最大定格＆電気的特性
| Core | ARM Cortex-M3 |
| Core Width | 32-bit |
| 最大クロック周波数 | 80 MHz |
| Program Memory (Flash) | 256 KB (256K x 8) |
| SRAM | 32 KB |
| EEPROM | 2 KB |
| Supply Voltage Range | 1.71 V to 5.5 V |
| ADC | 12-bit SAR, 1 MSPS |
| DAC | Four 8-bit IDAC |
| Op-Amps | Four on-chip |
| Universal Digital Blocks (UDB) | 24 (UDB pair count 12) |
| GPIO Count | Up to 62 |
| パッケージ | 100-pin TQFP (14x14 mm) |
| 実装タイプ | Surface Mount |
| 動作温度範囲 | -40C to +85C (industrial) |
| DMA Channels | 32 |
| RoHS ステータス | Compliant |
| Series | PSoC 5LP, CY8C52LP |
CY8C5287AXI-LP095 100-pin tqfp (14x14 mm) ピン配置ガイド
CY8C5287AXI-LP095 (100-pin tqfp (14x14 mm) パッケージ) のピン配置。 このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。
詳細なピン配置データはありません: CY8C5287AXI-LP095.
詳細は データシート をご参照ください。
主な用途
CY8C5287AXI-LP095 の用途: 6 件s: Industrial Sensor Signal Conditioning, CapSense Touch User Interface, USB HID / Composite Device, Brushless DC Motor Control, Programmable Logic Replacement (UDB-based), Field-Upgradeable Consumer Electronics.
Industrial Sensor Signal Conditioning
The CY8C5287AXI-LP095 fits industrial sensor signal-conditioning boards because it integrates four on-chip op-amps, four 8-bit IDACs, and a 12-bit 1 MSPS SAR ADC alongside the Cortex-M3 core. The 1.71-5.5 V supply tolerates 24 V industrial rails after a small LDO. Programmable analog blocks let designers build gain, filter, and bridge-completion stages without external analog ICs, reducing BOM and PCB area for sensor-conditioning applications.
おすすめ
CapSense Touch User Interface
PSoC 5LP's CapSense block pairs with the CY8C5287AXI-LP095 to implement up to 62 touch buttons, sliders, or proximity sensors with no external touch IC. The Cortex-M3's 80 MHz clock easily scans the CapSense sigma-delta converter and processes gesture algorithms in real time. Designers benefit from a 1.71-5.5 V supply, enabling battery-powered 3.3 V or single-cell Li-ion powered user-interface boards.
おすすめ
USB HID / Composite Device
The CY8C5287AXI-LP095's USB 2.0 full-speed block and 80 MHz core let it implement USB HID, CDC, and composite device firmware without an external PHY. Its 256 KB Flash accommodates USB descriptors, HID report tables, and CDC class stacks. The 32 KB SRAM and 32-channel DMA keep USB endpoints fed without CPU stalls, while PSoC Creator's USB middleware shortens time-to-prototype for HID peripherals.
おすすめ
Brushless DC Motor Control
With 24 UDBs and a Cortex-M3 running 80 MHz, the CY8C5287AXI-LP095 can generate center-aligned PWMs, decode Hall sensors or quadrature encoders, and run field-oriented control loops for small BLDC motors up to several hundred watts. The on-chip 12-bit ADC samples phase currents at 1 MSPS, enabling high-bandwidth current control. Designers get the motor drive plus the user interface in one chip, reducing board area.
おすすめ
Programmable Logic Replacement (UDB-based)
Each PSoC 5LP UDB delivers FPGA-like functionality: combinatorial logic, state machines, timers, and serial blocks. The CY8C5287AXI-LP095 with 24 UDBs can replace small CPLDs implementing glue logic, custom serial protocols, or parallel-to-serial conversion, all configured through PSoC Creator. This dramatically reduces BOM cost and PCB area versus separate CPLD + MCU solutions for protocol-bridging applications.
おすすめ
Field-Upgradeable Consumer Electronics
With 256 KB Flash and an in-system programmable Flash array, the CY8C5287AXI-LP095 supports bootloader-based field upgrades over UART, USB, or I2C for consumer appliances. Its wide 1.71-5.5 V supply lets it run from a single Li-ion cell or a 5 V USB rail. Designers can ship a single hardware revision and push new features, security patches, or UI updates to installed products.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: CY8C5287AXI-LP095 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | CY8C5288AXI-LP095 | CY8C5287AXI-LP096 | CY8C5267AXI-LP051 | CY8C5468AXI-LP106 | CY8C5667AXI-LP040 |
|---|---|---|---|---|---|---|
| Package | 100-pin TQFP (14x14 mm) | 100-pin TQFP (14x14 mm) - same | 100-pin TQFP (14x14 mm) - same | 100-pin TQFP (14x14 mm) - same | 100-pin TQFP (14x14 mm) - same | 100-pin TQFP (14x14 mm) - same |
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Core | ARM Cortex-M3 | ARM Cortex-M3 | ARM Cortex-M3 | ARM Cortex-M3 | ARM Cortex-M3 | ARM Cortex-M3 |
| Clock Frequency | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 67 MHz | 67 MHz |
| Flash | 256 KB | 256 KB+ | 256 KB | 128 KB | 256 KB | 256 KB |
| SRAM | 32 KB | 32 KB+ | 32 KB | 32 KB | 64 KB | 128 KB |
| ADC | 12-bit SAR 1 MSPS | 12-bit SAR 1 MSPS | 12-bit SAR 1 MSPS | 12-bit SAR 1 MSPS | 12-bit SAR 1 MSPS | 12-bit SAR 1 MSPS |
| UDB Count | 24 (12 pairs) | 24 (12 pairs) | 24 (12 pairs) | 16 (8 pairs) | 24 (12 pairs) | 24 (12 pairs) |
| Supply Voltage | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V | 1.71 V to 5.5 V |
主な差別化要因
- PSoC 5LP programmable analog and digital fabric on-chip （vs CY8C5468AXI-LP106)
- Higher 80 MHz Cortex-M3 clock speed vs 67 MHz parts （vs CY8C5667AXI-LP040)
- 32-channel DMA engine offloads Cortex-M3 core （vs CY8C5267AXI-LP051)
設計ノート
Place a 1 µF + 0.1 µF ceramic decoupling pair on every VDD pin of the CY8C5287AXI-LP095, located within 3 mm of the package pin. Add a bulk 10 µF tantalum or ceramic near the supply pin of the regulator. The wide 1.71-5.5 V supply lets you run directly from a single Li-ion cell, but bypassing remains essential because UDB switching edges inject high-frequency noise into the analog fabric.
Route analog signals on a different layer than digital switching signals; use the dedicated VDDA pin with its own ferrite-bead-isolated analog LDO branch. The 100-pin TQFP has exposed thermal pad tied to ground - stitch at least 8 vias in the pad to a continuous inner ground plane to drop junction-to-ambient thermal resistance.
Do not leave unused GPIO floating during PSoC Creator boot - configure them in the .cydwr file with explicit 'Analog Hi-Z' or 'Pull-Down' settings, otherwise the boot ROM can latch into a debugger-detected mode. When migrating from CY8C5287AXI-LP095 to CY8C5288AXI-LP095, regenerate the project in PSoC Creator to update linker scripts because the Flash size differs.
コンプライアンス情報
RoHS and REACH compliant per Infineon product page. Not AEC-Q100 qualified - check CY8C5287AXI-LP095-LQ automotive variant for automotive use. Halogen-free status not stated in the verified web data and marked as 'unknown'.
