LMG3104R017 - 100V 1.7mΩ GaN FET with Integrated Driver | Texas Instruments
N.º de pieza: LMG3104R017 ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $8.9 | $8,90 |
| 10 | $7.95 | $79,50 |
| 100 | $6.85 | $685,00 |
| 500 | $5.92 | $2.960,00 |
| 1.000 | $5.2 | $5.200,00 |
| 3.000 | $4.65 | $13.950,00 |
LMG3104R017 Descripción general
An enhancement-mode GaN HEMT (High Electron Mobility Transistor) is a wide-bandgap power transistor that conducts when a positive gate voltage is applied. GaN FETs offer lower switching losses, smaller output charge, and higher switching frequency than silicon MOSFETs of equivalent RDS(on). GaN belongs to the wider wide-bandgap semiconductor family alongside SiC and is increasingly used in power management ICs, discrete power switches, and integrated power stages where high efficiency and small form factor matter.
Key specifications include 100V drain-source blocking voltage, 1.7mΩ typical on-resistance, integrated gate driver with bootstrap support, cycle-by-cycle overcurrent protection, and overtemperature shutdown. The integrated driver eliminates the parasitic inductance between a discrete gate driver and FET, enabling sub-nanosecond switching edges with controlled ringing. Built-in smart-switching features reduce EMI by managing slew rate during turn-on and turn-off transitions.
The architecture pairs a TI GaN-on-Si HEMT die with a companion silicon gate-driver die inside the same package, communicating through internal bond wires and a low-impedance Kelvin source connection. This co-packaged approach achieves gate-loop inductance of roughly 0.5 nH, far below what is achievable with a discrete driver plus FET layout, which is the main reason GaN power stages switch at multi-MHz frequencies without unacceptable ringing.
Typical applications include 48V telecom and server bus converters, 48V to 12V intermediate bus architectures, high-density DC-DC point-of-load stages, solar microinverters and optimizers, industrial motor drives below 100V, and Class-D audio amplifiers. The half-bridge compatibility makes it especially suited to synchronous buck, boost, and half-bridge topologies.
A key design consideration: the bootstrap circuit requires a low-leakage bootstrap diode and a properly sized boot capacitor rated above the maximum high-side supply rail. Pay close attention to PCB layout of the power loop, since even a few nH of stray inductance can defeat the GaN advantage and cause dangerous voltage overshoot during turn-off.
This page synthesizes distributor pricing, drop-in GaN alternatives from the same LMG310x family, design notes on layout and thermal management, and a pin-for-pin compatibility matrix not bundled in the manufacturer datasheet.
Alternativas directas para LMG3104R017 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
LMG3104R011
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
LMG3104R026
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
LMG3103R017
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
LMG3100R017
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
LMG3100R044
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
LMG3104R017VBER
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
LMG3104R017 Valores máximos y características eléctricas
| Drain-to-Source Voltage (VDS) | 100 V |
| Typical On-Resistance (RDS(on)) | 1.7 mΩ |
| Technology | Enhancement-mode GaN HEMT |
| Integrated Gate Driver | Yes (high-frequency, internal level shift) |
| Bootstrap Support | Yes (for high-side in half-bridge) |
| Input Mode | Independent Input Mode (IIM) with logic interlock |
| Protección contra sobrecorriente | Yes (cycle-by-cycle) |
| Overtemperature Protection | Yes (thermal shutdown) |
| Smart-Switching / Slew Control | Yes |
| Tipo de montaje | Surface Mount |
| Estado RoHS | Compliant (per TI product page) |
| Half-Bridge Capable | Yes (two devices, no external level shifter) |
Configuración de pines de LMG3104R017
| Pin 1 | VIN — Input voltage to high-side GaN FET drain (per datasheet pin map) |
| Pin 2 | BST — Bootstrap supply for high-side gate driver |
| Pin 3 | SW — Switch node (between high-side source and low-side drain) |
| Pin 4 | GND — Power ground return and low-side source |
| Pin 5 | VDD — Low-side gate-driver bias supply |
| Pin 6 | IN — PWM logic input (active high, with IIM interlock for LMG3104) |
| Pin 7 | FLT — Fault flag output (open-drain, asserts on OC/OT) |
| Pin 8 | EN — Enable input (active high) |
| Pin 9 | PGND — Power ground for gate driver return |
| Pin 10 | NC — Not connected (per datasheet) |
| Pin 11 | NC — Not connected (per datasheet) |
| Pin 12 | NC — Not connected (per datasheet) |
| Pin 13 | NC — Not connected (per datasheet) |
| Pin EP | Exposed Pad — Thermal pad, must be soldered to PCB ground plane for heatsinking |
Aplicaciones típicas
LMG3104R017 es adecuado para 7 aplicacións: 48V Telecom and Server Intermediate Bus Converter, 48V to 12V Point-of-Load (PoL) DC-DC Stage, Solar Microinverter and DC Optimizer, Industrial Motor Drive Below 100V, Class-D Audio Amplifier Output Stage, High-Density Synchronous Buck for AI Accelerator Boards, Telecom Brick Replacement / 48V Distributed Power.
48V Telecom and Server Intermediate Bus Converter
The LMG3104R017's 100V rating comfortably covers 48V nominal rails with margin for transients up to ~80V, while its 1.7mΩ RDS(on) keeps conduction loss low at high load current. The integrated gate driver and half-bridge support let a designer build a two-stage 48V-to-12V bus converter switching at 1 MHz or above, shrinking magnetics by an order of magnitude versus 100 kHz silicon designs. Smart-switching slew control reduces EMI to meet CISPR 22 conducted and radiated limits without large snubbers, and the IIM logic interlock protects against shoot-through in the half-bridge during transient load steps typical of server CPU power demands.
Recomendado
48V to 12V Point-of-Load (PoL) DC-DC Stage
A 48V-to-12V synchronous buck built around the LMG3104R017 can switch at MHz frequencies with the integrated driver keeping gate-loop inductance low. The 1.7mΩ on-resistance minimizes conduction loss across the high-side and low-side FETs, while the cycle-by-cycle overcurrent protection guards against inductor saturation during load transients. Two devices wired as half-bridge deliver clean 12V at hundreds of watts from a 48V backplane, which is increasingly common in hyperscale servers, AI accelerator boards, and 48V automotive rails. Compared with silicon MOSFETs of similar rating, the GaN power stage shrinks output filter size and improves light-load efficiency.
Recomendado
Solar Microinverter and DC Optimizer
The LMG3104R017's 100V blocking voltage suits residential and commercial PV strings operating below the 100V safety limit, and its low RDS(on) extracts more energy per panel. Two devices forming a half-bridge drive a high-frequency transformer isolated DC-DC stage feeding the grid-tie inverter, where the integrated driver eliminates the parasitic inductance that typically limits GaN switching frequency. Cycle-by-cycle overcurrent protection and overtemperature shutdown protect the module against panel short-circuit faults and hot-spot thermal events. This topology pushes switching frequency high enough to shrink the isolation transformer to a fraction of a 50/60 Hz design.
Recomendado
Industrial Motor Drive Below 100V
Low-voltage industrial motor drives for AGVs, robotics, and battery-powered equipment benefit from the LMG3104R017's high switching frequency and integrated protection. A three-phase inverter built from six devices (three half-bridges) drives 48V or 60V brushless DC motors with PWM frequencies high enough to push acoustic noise above the audible band, while the integrated driver's cycle-by-cycle overcurrent trips during stall events protect the motor windings. The 1.7mΩ RDS(on) cuts I²R losses enough to deliver more torque from the same battery capacity. Logic interlock in IIM prevents shoot-through that would otherwise destroy the half-bridge during rapid direction changes.
Recomendado
Class-D Audio Amplifier Output Stage
High-end Class-D audio amplifiers benefit from the LMG3104R017's very low RDS(on), low output charge, and high switching frequency. Two devices form a half-bridge output stage that switches above the AM band to ease output-LC filter design, while the integrated gate driver keeps dead time to a minimum, lowering distortion and improving total harmonic distortion (THD) figures. The 100V rating supports amplifier rails from a few volts up to about ±35V (70V bus) cleanly with margin. Smart-switching slew control minimizes EMI without adding large external snubbers that would otherwise dissipate power and degrade damping factor.
Recomendado
High-Density Synchronous Buck for AI Accelerator Boards
AI accelerator and GPU boards often stack 48V-to-1V conversion stages where power density is the limiting factor. The LMG3104R017's 1.7mΩ RDS(on) and MHz-class switching capability allow a four-switch buck or stacked buck topology that fits 1000 W in a small footprint. Two GaN power stages form the half-bridge switching node, while cycle-by-cycle overcurrent trips during transient load steps from the accelerator die. Compared with silicon MOSFETs, the LMG3104R017 cuts switching loss enough to shrink the heatsink or eliminate forced cooling in many rack-mount designs, while the integrated level shifter removes the need for an external isolated gate-drive supply.
Recomendado
Telecom Brick Replacement / 48V Distributed Power
Distributed 48V power architectures for telecom and edge compute need small, efficient bricks to step 48V down to 12V or 5V at hundreds of watts. The LMG3104R017's 100V rating with margin and 1.7mΩ on-resistance make it well-suited as the switching element in a high-density LLC or hard-switched half-bridge brick, while the integrated driver and bootstrap let a designer build the power stage without isolated gate-drive bias for the high side. The 100V GaN half-bridge runs at multi-MHz switching frequencies to shrink the resonant inductor or output filter compared with silicon designs, increasing power density per cubic inch of the brick.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para LMG3104R017 — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | LMG3104R011 | LMG3104R026 | LMG3103R017 | LMG3100R017 |
|---|---|---|---|---|---|
| Package | LMG310x power-stage module | LMG310x power-stage module - same | LMG310x power-stage module - same | LMG310x power-stage module - same | Bare GaN die package (no driver) - different pin map |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Drain-to-Source Voltage (VDS) | 100 V | 100 V | 100 V | 100 V | 100 V |
| Typical On-Resistance (RDS(on)) | 1.7 mΩ | ~11 mΩ | ~26 mΩ | 1.7 mΩ | 1.7 mΩ |
| Integrated Gate Driver | Yes | Yes | Yes | Yes | No (bare FET, external driver required) |
| IIM Logic Interlock | Yes (LMG3104 variant) | Yes | Yes | No (LMG3103 variant) | N/A (bare FET) |
| Half-Bridge Capable (two devices) | Yes | Yes | Yes | Yes | No (no integrated level shifter) |
| Smart-Switching Slew Control | Yes | Yes | Yes | Yes | N/A (driver-less) |
| Overcurrent / Overtemperature Protection | Yes (cycle-by-cycle OC + OT) | Yes | Yes | Yes | No |
Diferenciadores clave
- IIM logic interlock prevents half-bridge shoot-through (frente a LMG3103R017)
- Integrated gate driver and level shifter in one package (frente a LMG3100R017 (bare GaN FET))
- 1.7mΩ RDS(on) with 100V rating (frente a LMG3104R026 (~26 mΩ RDS(on)))
- Smart-switching slew control built in (frente a LMG3100R017)
Notas de diseño
Minimize the high-current power loop between the input bypass capacitor, the two GaN FETs, and the inductor. The LMG310xR0xx datasheet reference layout uses a tightly-coupled input cap directly at VIN/GND pins with the SW node as short as practical. Estimated: each nanohenry of stray loop inductance adds roughly 1V of overshoot per 1A/ns of turn-off current, so the layout discipline is the single biggest determinant of EMI and reliability.
Solder the exposed thermal pad to a large copper pour on the top layer and stitch thermal vias to inner copper planes. Estimated: at 30A continuous and 1.7mΩ on-resistance, conduction loss alone is ~1.5W; switching losses at 1 MHz add another 1-2W per device, so a 4-layer board with at least 1 square inch of top copper is the realistic minimum for full-current operation. Derate current if the package cannot keep junction temperature below 125°C.
The bootstrap circuit requires a low-leakage fast-recovery bootstrap diode and a bootstrap capacitor sized for the high-side driver's quiescent current and the PWM duty cycle. Estimated: a 100 nF to 470 nF X7R ceramic cap rated at 25V or higher typically suffices at 1 MHz; undersizing causes the high-side gate drive to starve at high duty cycles, leading to rising RDS(on) and thermal runaway. Place the boot cap directly between BST and SW with minimal trace length.
Do not float the EN pin or leave the fault output unconnected - LMG3104R017 relies on the FLT pin to flag protection events to the system controller. Tie unused inputs to a defined logic level (do not let them drift), and add a small RC filter on the gate-driver bias (VDD) pin to suppress ringing. Avoid running the SW node through long traces that couple noise back into adjacent analog circuits; use a ground guard ring if routing near signal traces.
Información de cumplimiento
RoHS and REACH compliance per TI product page. AEC-Q100 not applicable for this power-stage category; automotive-grade variants exist in related TI GaN families. Conflict-minerals statement compliant per TI corporate policy.
