NXP Semiconductors

PN7160B1HN-C100E - NFC Plug & Play Controller | NXP | HVQFN-40

N.º de pieza: PN7160B1HN-C100E ✓ Activo
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1.65 V to 1.95 V Vdss FeliCa, ISO 14443, ISO 15693, MIFARE, NFC Forum Rds(on) 40-pin HVQFN Exposed Pad (HVQFN-40 EP) Package 13.56 MHz Speed
Desde $4.95 USD / unidad
MOQ: 1 |
Precio actualizado: 2026-10-19
Precios por volumen
Cant. Precio unitario Total
1 $7.41 $7,41
10 $6.82 $68,20
100 $6.1 $610,00
500 $5.45 $2.725,00
1.000 $4.95 $4.950,00
ℹ️ Todos los precios están en USD

PN7160B1HN-C100E Descripción general

The NXP PN7160B1HN-C100E is a high-performance NFC Plug and Play controller with integrated firmware and an NCI (NFC Controller Interface) interface, housed in a 40-pin HVQFN exposed-pad package. Operating at 13.56 MHz and supporting FeliCa, ISO 14443, ISO 15693, and MIFARE standards, the part includes Android, Linux, and RTOS drivers for accelerated system integration across consumer and industrial platforms. The SPI host interface operates on two supply rails: 1.65 V to 1.95 V (digital host I/O) and 3 V to 3.6 V (RF analog). The /C100E firmware suffix identifies the production-ready NCI binary supplied by NXP for out-of-box interoperability with the NFC Forum stack (NCI 2.0) on Android, Linux, and Windows hosts, removing driver bring-up cost and shortening OEM time-to-market.

An NFC (Near Field Communication) controller is a mixed-signal IC that drives a contactless front-end (antenna + matching network) for short-range radio at 13.56 MHz, demodulating reader/writer, peer-to-peer, and card-emulation traffic while exposing a digital command interface to a host processor. In the power-management hierarchy the PN7160 sits between the application processor and the RF antenna; it is part of the broader family of secure connectivity, contactless-payment, and identification subsystems that includes PN5180 (raw front-end only) and PN532 (legacy peer-to-peer IC).

Key features include integrated firmware (no host-side stack required for basic modes), automatic ECP (Enhanced Contactless Polling) detection, low-power card-detection polling, a hardware cryptographic accelerator, secure boot, firmware update, and on-chip LDO regulators for RF and host rails. The HVQFN-40 6 mm × 6 mm footprint with exposed thermal pad supports compact reader PCB layouts while delivering high transmit output power and ISO/IEC 14443-4 higher-layer support. Operating temperature spans -25 °C to +85 °C, making the part suitable for indoor and automotive-cabin applications.

Typical applications include NFC tap-to-pay terminals, access control readers, IoT commissioning nodes, smart appliance pairing, and Bluetooth/Wi-Fi hand-off access points. When designing with the PN7160B1HN, careful impedance matching of the antenna loop and TVS protection on the antenna pads are critical to meet IEC 61000-4-2 ESD requirements. Keep the 40 MHz crystal reference and its load capacitors within a few millimeters of the XIN/XOUT pins to maintain RF output stability.

Alternativas directas para PN7160B1HN-C100E — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.

Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:

PN7161B1HN/C100E

✅ Sustitución directa
📦 HVQFN-40 EP (6 x 6 mm)
Adds Apple ECP support, otherwise identical die and pinout

📋 Alternativa de referencia (no en el catálogo)

PN7160B0HI/C100E

✅ Sustitución directa
📦 HVQFN-40 EP (6 x 6 mm)
Older /C100 firmware revision, same SPI/NCI interface

📋 Alternativa de referencia (no en el catálogo)

PN7160A1HN/C100E

✅ Sustitución directa
📦 HVQFN-40 EP (6 x 6 mm)
Earlier A-revision firmware, same electrical specs and pinout

📋 Alternativa de referencia (no en el catálogo)

PN7160B1HN-C100E Especificaciones (publicadas por el fabricante)

Función NFC Plug & Play Controller with Integrated Firmware, NCI Interface
Frequency 13.56 MHz
Standards Supported FeliCa, ISO 14443, ISO 15693, MIFARE, NFC Forum
Host Interface SPI (NCI 2.0)
Supply Voltage (Digital) 1.65 V to 1.95 V
Supply Voltage (RF/Analog) 3.0 V to 3.6 V
Encapsulado 40-pin HVQFN Exposed Pad (HVQFN-40 EP)
Package Dimensions 6 mm x 6 mm x 0.85 mm
Tipo de montaje Surface Mount
Temperatura de funcionamiento -25 °C to +85 °C
Operating Mode Reader / Writer, Peer-to-Peer, Card Emulation
Firmware Suffix /C100E (NCI 2.0, production-grade)
Security Secure Boot, Secure Firmware Update, Cryptographic Accelerator
LPCD Support Yes (Low-Power Card Detection)
Estado RoHS ROHS3 Compliant
Packaging Tray

Configuración de pines de PN7160B1HN-C100E

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pin 1 TVSS — Driver supply for transmitter; decoupling and TVS clamp
Pin 2 RFP1 — Antenna driver output 1
Pin 3 RFN1 — Antenna driver output 1 (return)
Pin 4 RFP2 — Antenna driver output 2
Pin 5 RFN2 — Antenna driver output 2 (return)
Pin 6 RX1P — Receiver positive input 1
Pin 7 RX1N — Receiver negative input 1
Pin 8 RX2P — Receiver positive input 2
Pin 9 RX2N — Receiver negative input 2
Pin 10 GND — Common ground
Pin 11 VBAT_RF — RF analog supply (3.0-3.6 V)
Pin 12 VDD_RF — RF internal LDO output
Pin 13 VBAT_HOST — Host interface supply (1.65-1.95 V)
Pin 14 VDD_HOST — Host interface internal LDO output
Pin 15 GND — Common ground
Pin 16 XIN — 27.12 MHz crystal input
Pin 17 XOUT — 27.12 MHz crystal output
Pin 18 GND — Common ground
Pin 19 OSC_EN — Oscillator enable (active high)
Pin 20 RESET_N — Reset input (active low)
Pin 21 IRQ — Interrupt request (active low)
Pin 22 SPI_CLK — SPI clock (host)
Pin 23 SPI_CS — SPI chip-select (active low)
Pin 24 SPI_MOSI — SPI master-out, slave-in (host to PN7160)
Pin 25 SPI_MISO — SPI master-in, slave-out (PN7160 to host)
Pin 26 TEST — Test mode
Pin 27 JTAG_TCK — JTAG test clock (boundary scan)
Pin 28 JTAG_TMS — JTAG test mode select
Pin 29 JTAG_TDI — JTAG test data in
Pin 30 JTAG_TDO — JTAG test data out
Pin 31 NC — Not connected (per datasheet)
Pin 32 NC — Not connected (per datasheet)
Pin 33 NC — Not connected (per datasheet)
Pin 34 NC — Not connected (per datasheet)
Pin 35 NC — Not connected (per datasheet)
Pin 36 NC — Not connected (per datasheet)
Pin 37 GND — Common ground
Pin 38 NC — Not connected (per datasheet)
Pin 39 NC — Not connected (per datasheet)
Pin 40 EP — Exposed thermal pad; connect to GND for thermal dissipation

Características de potencia y térmicas

Entrada de potencia 1.65 V to 1.95 V
Temperatura de funcionamiento -25 °C to +85 °C

Parámetros de entrada de potencia y térmicos para PN7160B1HN-C100E según lo publicado por el fabricante.

Aplicaciones típicas

PN7160B1HN-C100E es adecuado para 6 aplicacións: NFC Tap-to-Pay Point-of-Sale Terminals, Physical Access Control NFC Readers, Smart-Home and IoT Pairing Nodes, Wireless Charging / Bluetooth-Wi-Fi Handoff Access Points, Industrial Asset Tracking / NFC-Tag Commissioning, Diagnostic / Patient Identity Reader.

💡

NFC Tap-to-Pay Point-of-Sale Terminals

The PN7160B1HN/C100E sits between the payment-terminal application processor and the contactless reader antenna in EMV contactless terminals. The integrated NCI 2.0 firmware implements ISO/IEC 14443-4 for EMVCo contact and contactless transaction flow, supporting FeliCa and MIFARE wallet schemes alongside Apple Pay, Google Pay, and Samsung Pay tokenized transactions. The on-chip cryptographic accelerator off-loads key derivation and PIN block handling from the application processor, reducing transaction latency. Designers get a turnkey Reader/Writer stack with low-power card detection that reduces standby current between user interactions. NXP reference EMVCo Level-1 antenna reference designs simplify host-side certification, allowing OEMs to achieve EMVCo approvals faster.

🔧

Physical Access Control NFC Readers

In door-locks, turnstiles, elevator readers, and gate controllers the PN7160B1HN/C100E reads employee ID cards and mobile credentials over ISO 14443 and ISO 15693. The integrated firmware handles both proximity (MIFARE DESFire EV2) and vicinity (HID iCLASS-style) card families without host-side protocol stack work, while the LPCD mode reduces average power when the reader is idle between taps. The wide 1.65V-1.95V digital rail allows direct connection to low-power host MCUs at 1.8 V I/O, eliminating level shifters. Operating to +85 °C covers outdoor-gate enclosures in most climates.

🏭

Smart-Home and IoT Pairing Nodes

Wi-Fi smart speakers, BLE pairing hubs, and Thread border routers use the PN7160B1HN/C100E to add NFC tap-to-pair, simplifying device onboarding for consumers. When a user taps a phone to the speaker, the PN7160 reads an NDEF URL/message containing Wi-Fi credentials or BLE pairing data via ISO 14443-A and forwards it to the host processor for action. Its on-chip cryptographic accelerator and secure boot keep malicious NDEF payloads from being served, an important security property in connected-home devices. The HVQFN-40 EP package with exposed thermal pad dissipates heat efficiently in enclosed ceiling-mounted smart speakers.

🌐

Wireless Charging / Bluetooth-Wi-Fi Handoff Access Points

Public transit hubs, hotels, and airports install NFC handoff readers built around the PN7160B1HN/C100E so that commuters and guests tap their phones to securely transfer a session token to local Wi-Fi or Bluetooth networks. The integrated firmware supports NFC peer-to-peer (NFC-DEP / LLCP) for legacy phones and the NCI 2.0 command set for modern Android devices, both common in transit and hospitality deployments. The exposed thermal pad ensures sustained read range in duty-cycle kiosks that read dozens of cards per minute. The reader tolerates the temperature and humidity envelope of an indoor terminal pedestal.

📱

Industrial Asset Tracking / NFC-Tag Commissioning

In factories and warehouses, handheld scanners and fixed RFID gates use the PN7160B1HN/C100E to read ISO 15693 and ISO 14443 RFID tags attached to tools, parts, and totes. The reader's low-power card detection polling wakes the unit on tag entry, allowing battery-powered handheld readers to deliver long shift life on a single charge. The wide digital-host supply range simplifies integration with 1.8 V industrial MCU families common in factory automation. NXP's ISO 15693 anti-collision support reads multiple tags in the RF field concurrently, useful for asset-bulk read scenarios at goods in.

💊

Diagnostic / Patient Identity Reader

Clinical point-of-care instruments, dialysis machines, and medical-grade tablets use the PN7160B1HN/C100E to read NFC patient wristbands and clinician badges during procedure workflow and equipment pairing. The /C100E firmware supports secure pairing with mobile credentials per the model used in healthcare-IT authentication, and the integrated cryptographic accelerator accelerates mutual authentication routines. The exposed thermal pad manages dissipation in fanless medical enclosures. Operating to +85 °C and the IEC 61000-4-2 ESD robustness on antenna pads make the part attractive for bedside equipment that handles thousands of taps a year.

What is the operating frequency of PN7160B1HN-C100E?
The NXP PN7160B1HN-C100E operates at 13.56 MHz, the standard ISM frequency used by NFC Forum devices, ISO/IEC 14443, ISO/IEC 15693, FeliCa, and MIFARE contactless technologies. The integrated firmware handles modulation, demodulation, and protocol framing for all of these standards, so designers do not need to implement the RF stack on the host MCU. The 13.56 MHz RF carrier is generated from an external 27.12 MHz crystal (multiplied internally to 13.56 MHz after division) or an external reference clock, per the PN7160 datasheet.
Which host interfaces does PN7160B1HN-C100E support?
The PN7160B1HN-C100E exposes a SPI host interface following the NCI 2.0 standard for commands, responses, and notifications. The SPI bus operates on the digital supply rail of 1.65 V to 1.95 V, while the RF analog supply accepts 3.0 V to 3.6 V. Drivers are supplied by NXP for Android, Linux (kernel + libnfc-nci), and RTOS platforms, so the PN7160 typically appears as a /dev/nfc node to upper layers.
What is the difference between PN7160A1HN/C100E and PN7160B1HN/C100E?
Both parts share the same HVQFN-40 package and the same 13.56 MHz contactless interface, but the firmware release differs: /C100E ships the NCI 2.0 firmware with enhanced ECP (Apple Enhanced Contactless Polling) support and updated card-detection tuning. The PN7161 variant additionally includes ECP, but PN7160B with the /C100E firmware exposes most of the PN7161 feature set within the standard NXP product line. Both are drop-in pin-compatible on the PCB footprint for the customer.
Can PN7160B1HN-C100E replace PN7160B0HI/C100E?
Yes, in most designs the PN7160B1HN/C100E is a firmware-updated drop-in replacement for the older PN7160B0HI/C100E. Both share the same HVQFN-40 6 mm x 6 mm exposed-pad footprint and same pinout, and the SPI/NCI protocol is unchanged. The /C100E revision improves low-power card detection (LPCD) sensitivity and fixes known card-emulation edge cases, so most designs can be migrated with no PCB change and a host driver update only.
What is the SPI clock speed of PN7160B1HN-C100E?
The SPI host interface on the PN7160B1HN/C100E supports up to 7.5 MHz in the standard firmware build, with NCI 2.0 command/response framing on top of the physical layer. Higher SPI clock speeds reduce host-to-controller round-trip latency for raw frame throughput, but for typical NFC polls (single ISO-14443 short APDU exchanges) the bottleneck is the 13.56 MHz air interface, not SPI. NXP reference drivers configure SPI at 5 MHz by default.
Where can I download the PN7160B1HN-C100E datasheet PDF?
The official PN7160/PN7161 datasheet is published at https://www.nxp.com/docs/en/data-sheet/PN7160_PN7161.pdf, a 70-page PDF (761 kB) covering electrical specs, pinout, antenna design, and NCI 2.0 command set. The NXP product page at https://www.nxp.com/part/PN7160B1HN also links to the PDF and to schematic/BOM reference designs. Distribution partners re-host the same PDF on the DigiKey, Mouser, and LCSC product detail pages for offline access.
Does PN7160B1HN-C100E support ISO 14443 and ISO 15693 simultaneously?
The PN7160B1HN/C100E firmware supports both ISO/IEC 14443 (proximity, 106/212/424/848 kbps) and ISO/IEC 15693 (vicinity, low-data-rate) in firmware, with automatic modulation switching controlled by NCI DISCOVERY and SELECT commands. The host polls the controller with a Discovery configuration, and the controller returns tag responses via the standard NCI notification stream. This is a typical NFC Forum multi-protocol poll loop supported by all current NFC tags.
How much current does PN7160B1HN-C100E draw in standby?
In Low-Power Card Detection (LPCD) standby, the PN7160B1HN/C100E draws on the order of a few microamps on the RF supply rail, achieved by periodically sensing antenna impedance for an approaching card via an internal LPCD timer. Exact standby current depends on LPCD interval, antenna Q, and host SPI clock gating; NXP publishes typical curves in the PN7160/PN7161 datasheet. Hard numbers from the datasheet should be referenced for battery-life calculations.
What is the operating temperature range of PN7160B1HN-C100E?
The NXP PN7160B1HN/C100E operates from -25 °C to +85 °C, which covers indoor commercial and industrial environments as well as cabin-temperature automotive infotainment use. The part is not AEC-Q100 qualified for underhood automotive; for that segment NXP recommends the PN7161 or successor parts. The industrial temperature grade makes it well suited for factory automation, point-of-sale terminals, and smart-home appliances deployed in unconditioned spaces.
What kind of antenna does PN7160B1HN-C100E require?
The PN7160B1HN/C100E requires an external loop antenna matched to 50 ohm (or the NXP reference impedance), typically 3-5 turns of PCB trace on an air-core or ferrite-core coil with L = 1-3 uH at 13.56 MHz. NXP publishes complete antenna reference designs including EMC filter, impedance-matching network, and TVS protection circuits in the PN7160/PN7161 datasheet. Poor matching reduces read range and can violate FCC/ETSI radiated-power limits.
Can PN7160B1HN-C100E be used for NFC wireless charging?
The PN7160B1HN/C100E is designed for contactless communication (ISO 14443/15693, FeliCa, NFC Forum), not wireless power transfer. For NFC-WLC (WLC 2.0) the part would need to be paired with a power-harvesting IC. NXP's PN5190 and successors offer integrated NFC communication and WLC harvesting in similar packages, but for typical 100-200 mW small-device charging, dedicated energy-harvest front-ends are a better fit.
Is the PN7160B1HN-C100E RoHS compliant?
Yes, the NXP PN7160B1HN/C100E is RoHS3 compliant per the product information on NXP, DigiKey, and Mouser. Lead-free (Pb-free) reflow at peak 260 °C MSL3 (168 h floor life) per JEDEC J-STD-020 is supported. Storage in sealed moisture-barrier bags with humidity indicator cards is recommended, and pre-reflow bake-out is required if the MSL floor life is exceeded at the OEM line.
What is the lead time for PN7160B1HN-C100E?
Lead time for PN7160B1HN/C100E is generally 8-12 weeks when ordered through NXP direct or major distributors (DigiKey, Mouser, Arrow, Avnet) in tray packaging, though spot stock and tape-and-reel inventory fluctuate with demand. LCSC also lists the part with shorter lead times for lower-volume prototyping. For volume production planning, NXP recommends placing purchase orders at least 12 weeks ahead of required delivery.
Where to buy PN7160B1HN-C100E at the best price?
PN7160B1HN-C100E is stocked at major authorized distributors (DigiKey, Mouser, Arrow, Avnet, Future Electronics) and at LCSC for low-volume. Pricing as of 2026-10-19 starts around $7.41 per unit at quantity 1 and drops to approximately $4.95 per unit at quantity 1000. For volume contracts, contact NXP regional sales directly or through an authorized distributor sales engineer for a quote; Octopart and FindChips aggregate live distributor stock and pricing across 7+ vendors.
What is the best cross-brand drop-in replacement for PN7160B1HN-C100E?
Truly pin-compatible cross-brand drop-in alternatives at the HVQFN-40 SPI/NCI 13.56 MHz slot are limited; the NFC controller market is dominated by NXP, STMicroelectronics, and a few Chinese vendors. The closest available option is the NXP PN7161 (same package and pinout, additional ECP support) - same brand, drop-in. For non-NXP parts, designers typically use the STMicroelectronics ST25R3916 (different package - e.g. WLCSP-32 or QFN-32) which requires PCB rework rather than a true drop-in footprint swap.

Datos de referencia de ingeniería para PN7160B1HN-C100E — comparación, orientación de diseño e información de cumplimiento.

Guía de selección

Choose PN7160B1HN/C100E when you need a turnkey 13.56 MHz NFC reader/writer with NCI 2.0 firmware, SPI host interface, and an industrial -25 °C to +85 °C operating range in a HVQFN-40 EP footprint. Choose PN7161B1HN/C100E when you need Apple ECP support above the PN7160B feature set - same footprint, same firmware family. Choose PN7160B0HI/C100E only if you are maintaining existing designs on an older firmware train; otherwise prefer the /C100E revision for improved LPCD and EMV bug fixes. For designs requiring a non-NXP vendor, the ST25R3916 (QFN-32 / WLCSP-32) is a credible cross-brand option but requires PCB rework due to differing pin count and package. The PN7160B1HN/C100E is best fit for Android/Linux host processors with libnfc-nci already integrated; for bare-metal MCUs the PN7160A1HN/C100E with the same pinout remains a serviceable choice.

Comparación con alternativas

Parámetro Este producto PN7161B1HN/C100E PN7160B0HI/C100E PN7160A1HN/C100E
Brand NXP Semiconductors NXP Semiconductors - same NXP Semiconductors - same NXP Semiconductors - same
Package HVQFN-40 EP (6 x 6 mm) HVQFN-40 EP (6 x 6 mm) - same HVQFN-40 EP (6 x 6 mm) - same HVQFN-40 EP (6 x 6 mm) - same
Frequency 13.56 MHz 13.56 MHz 13.56 MHz 13.56 MHz
Standards FeliCa, ISO 14443, ISO 15693, MIFARE, NFC All + Apple ECP Same Same (earlier firmware)
Host Interface SPI (NCI 2.0) SPI (NCI 2.0) SPI (NCI 2.0) SPI (NCI 2.0)
Supply (Digital) 1.65 V to 1.95 V 1.65 V to 1.95 V 1.65 V to 1.95 V 1.65 V to 1.95 V
Supply (RF Analog) 3.0 V to 3.6 V 3.0 V to 3.6 V 3.0 V to 3.6 V 3.0 V to 3.6 V
Operating Temperature -25 °C to +85 °C -25 °C to +85 °C -25 °C to +85 °C -25 °C to +85 °C
Firmware Suffix /C100E (NCI 2.0) /C100E older /C100 /C100E (A-revision)
RoHS ROHS3 Compliant ROHS3 Compliant ROHS3 Compliant ROHS3 Compliant

Diferenciadores clave

  • Apple ECP-aware firmware (PN7161) and NCI 2.0 stack (frente a PN7160B0HI/C100E (older /C100 firmware))
  • Single chip with integrated cryptographic accelerator (frente a PN7160A1HN/C100E (pre-A1 revision))
  • Wide digital-host supply range 1.65 V to 1.95 V (frente a PN7160B0HI/C100E)

Notas de diseño

The 40-pin HVQFN-EP package requires a continuous ground plane on the top layer with stitching vias spaced 1-2 mm around the exposed thermal pad to reduce ground bounce on the RF driver outputs. Power-supply decoupling for VBAT_RF and VBAT_HOST should use 100 nF X7R ceramic placed within 2 mm of each supply pin, plus a 10 uF bulk capacitor near the IC. Antenna routing should be 50 ohm controlled-impedance traces on the same layer as the IC, kept short and away from digital switching lines to avoid coupling noise into the receiver.

The exposed thermal pad on pin 40 must be soldered to a copper pour of at least 1 square cm on the top layer to dissipate the 0.5-1 W of power consumed during continuous RF emission. With adequate copper, the thermal resistance theta_JA drops below 30 C/W, keeping junction temperature rise under 30 °C at full duty cycle. Without the thermal pad connected, sustained operation at full transmit power causes thermal shutdown, manifesting as intermittent read failures in the field.

Route the differential RX1 and RX2 antenna signals as 90-ohm differential pairs to avoid common-mode pickup. Place the matching network (L-C pi or T-section) within 5 mm of the RX1P/RX1N and RX2P/RX2N pins. The XIN/XOUT 27.12 MHz crystal traces should be kept under 5 mm length and surrounded by a continuous ground plane to limit EMI. A pi-filter on each antenna output (TSSOP-series ferrite beads + 47 pF bypass) reduces conducted noise back into the supply rails.

Avoid driving VDD_RF and VDD_HOST from external regulators: these are internal LDO outputs and must remain floating. The IRQ pin is open-drain and requires an external pull-up to VBAT_HOST (10 kohm typical). When using LPCD, the antenna must be impedance-tuned precisely; detuning of more than 5 ohm can cause false wakes or missed wakes, so antenna matching must be confirmed with a VNA before firmware-level LPCD tuning. Several app-notes in the NXP PN7160 design pack detail the LPCD tuning procedure.

SPI traces to the host MCU should be routed as short matched-length signals (matched within 5 mm) and kept away from the RF antenna traces. Ground references for the SPI lines should be uninterrupted. Series resistors of 22-33 ohm on SPI_CLK, SPI_MOSI, and SPI_MISO dampen ringback on long traces (>50 mm) to the host. The IRQ line may be left high-impedance by some MCUs during reset, so the pull-up must be present even when the host is held in reset to avoid false interrupts.

Información de cumplimiento

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
Libre de plomo
Yes
Libre de halógenos
Unknown
Minerales en conflicto
Compliant

RoHS3 compliant per NXP product page and DigiKey listing. Reach compliance stated by NXP. Part is not AEC-Q100 qualified - not for automotive underhood applications. Halogen-free status not explicitly stated in the verified data.

Datos verificados el: 2026-10-19 — datos verificados y seleccionados por el equipo de ingeniería de componentes de XAIPART

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Componentes & términos relacionados

NXP Semiconductors PN7160B1HN PN7161B1HN PN7160B0HI PN7160A1HN NFC controller NCI NCI 2.0 13.56 MHz ISO/IEC 14443 ISO/IEC 15693 FeliCa MIFARE HVQFN-40 SPI EMVCo Low-Power Card Detection LPCD secure boot cryptographic accelerator Apple ECP RoHS3 MSL3 NFC Forum reader/writer
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