W5500 - Hardwired TCP/IP Ethernet Controller SPI | WIZnet
N.º de pieza: W5500 ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $3.2 | $3,20 |
| 10 | $2.85 | $28,50 |
| 100 | $2.4 | $240,00 |
| 500 | $2.05 | $1.025,00 |
| 1.000 | $1.78 | $1.780,00 |
W5500 Descripción general
An Ethernet controller (also called a network controller or NIC controller) is a semiconductor device that offloads the low-level networking functions - framing, MAC addressing, PHY transceiver signaling, and protocol handling - from the host microcontroller. Hardwired TCP/IP controllers go further by implementing the TCP, UDP, IPv4, ICMP, PPPoE, ARP, and IGMP protocols in dedicated silicon rather than firmware. Within the broader taxonomy, the W5500 sits at: Ethernet controller -> network controller -> communication IC -> semiconductor. Compared to a microcontroller running an LWIP software stack, a hardwired controller delivers deterministic latency, low MCU overhead, and a smaller code footprint, but lacks the flexibility of full-protocol software stacks.
Key features include 10/100 Base-TX auto-negotiation, full/half-duplex operation, 8 independent socket buffers, a wake-on-LAN (WoL) pin for remote wake scenarios, and integrated 802.3az energy-efficient Ethernet support. The SPI interface runs from 0 to 80 MHz in variable-length mode and supports Mode 0 / Mode 3, allowing direct connection to most ARM Cortex-M, ESP32, AVR, and PIC hosts without glue logic.
The W5500's architecture is built around a hardwired protocol engine and dedicated socket memory blocks. Each of the 8 sockets has a Tx buffer and Rx buffer routed through an internal DMA-like engine, so the host MCU does not have to manage TCP state machines. The embedded PHY supports HP Auto-MDIX, eliminating the need for crossover cables. Compared to the legacy W5100 (80-pin), the W5500 reduces pin count to 48 and adds SPI efficiency improvements, while W5100S retains the 80-pin footprint for drop-in W5100 upgrades.
Typical applications include IoT sensor nodes, industrial Ethernet PLCs, smart-home gateways, IP-camera control planes, and Arduino/MCU Ethernet shields. The 32 KB buffer is sufficient for most MQTT/CoAP/HTTP payloads without external memory, and the SPI bus allows the part to be wired directly to microcontrollers that lack integrated Ethernet MAC/PHY.
Design consideration: because the W5500 integrates the PHY, the board must route the MDI differential signals as a 100-ohm differential pair and provide a 1:1 center-tap magnetics module. Decouple both 3.3 V analog and digital rails at the chip pins with 0.1 uF and 10 uF ceramics; share ground with the host MCU through a single stitch.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical hardware-design notes not consolidated in the manufacturer datasheet.
Alternativas directas para W5500 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Variantes de esta serie
Modelos de la misma serie compatibles directamente con W5500 (mismo factor de forma y huella) — difiere en Host Interface, Package.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
W5100S
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
W5100
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
W5300
✅ Sustitución directa ⚠️ Especificaciones sin verificar📋 Alternativa de referencia (no en el catálogo)
W5500 Especificaciones
| Función | Hardwired TCP/IP Ethernet Controller |
| Protocol Support | TCP, UDP, IPv4, ICMP, ARP, IGMP, PPPoE |
| Ethernet Standard | 10/100 Base-T/TX (IEEE 802.3) |
| PHY | Integrated, full-duplex, HP Auto-MDIX |
| Host Interface | SPI (Mode 0 / Mode 3), up to 80 MHz |
| Number of Sockets | 8 simultaneous |
| Internal Buffer | 32 KB (TX/RX) |
| Wake-on-LAN | Yes (WoL pin) |
| Tensión de alimentación | 3.3 V typ |
| Temperatura de funcionamiento | -40 C to +85 C |
| Encapsulado | 48-pin LQFP (7x7 mm) |
| Tipo de montaje | Surface Mount |
| Estado RoHS | Compliant |
| Lead-Free | Yes |
Configuración de pines de W5500
| Pin 1 | VDD — Digital supply 3.3 V |
| Pin 2 | SCSn — SPI chip select (active low) |
| Pin 3 | SCLK — SPI clock |
| Pin 4 | MISO — SPI master-in / slave-out |
| Pin 5 | MOSI — SPI master-out / slave-in |
| Pin 6 | INTn — Host interrupt output (active low) |
| Pin 7 | RSTn — Hardware reset (active low) |
| Pin 8 | GND — Ground |
| Pin 9 | WoL — Wake-on-LAN input |
| Pin 10 | RSVD — Reserved (per datasheet) |
| Pin 11 | MDI0P — MDI differential pair 0 positive |
| Pin 12 | MDI0N — MDI differential pair 0 negative |
| Pin 13 | MDI1P — MDI differential pair 1 positive |
| Pin 14 | MDI1N — MDI differential pair 1 negative |
| Pin 15 | AVDD — Analog supply 3.3 V |
| Pin 16 | AGND — Analog ground |
| Pin 17 | XTALP — 25 MHz crystal positive |
| Pin 18 | XTALN — 25 MHz crystal negative |
| Pin 19 | REG_1V3V1 — Internal 1.3 V regulator decoupling |
| Pin 20 | GND — Ground |
| Pin 21 | RSVD — Reserved (per datasheet) |
| Pin 22 | RSVD — Reserved (per datasheet) |
| Pin 23 | RSVD — Reserved (per datasheet) |
| Pin 24 | GND — Ground |
| Pin 25 | VDD — Digital supply 3.3 V |
| Pin 26 | TEST — Test pin (per datasheet) |
| Pin 27 | RSVD — Reserved (per datasheet) |
| Pin 28 | GND — Ground |
| Pin 29 | RSVD — Reserved (per datasheet) |
| Pin 30 | RSVD — Reserved (per datasheet) |
| Pin 31 | RSVD — Reserved (per datasheet) |
| Pin 32 | GND — Ground |
| Pin 33 | RSVD — Reserved (per datasheet) |
| Pin 34 | RSVD — Reserved (per datasheet) |
| Pin 35 | GND — Ground |
| Pin 36 | RSVD — Reserved (per datasheet) |
| Pin 37 | RSVD — Reserved (per datasheet) |
| Pin 38 | VDD — Digital supply 3.3 V |
| Pin 39 | RSVD — Reserved (per datasheet) |
| Pin 40 | RSVD — Reserved (per datasheet) |
| Pin 41 | RSVD — Reserved (per datasheet) |
| Pin 42 | GND — Ground |
| Pin 43 | RSVD — Reserved (per datasheet) |
| Pin 44 | RSVD — Reserved (per datasheet) |
| Pin 45 | GND — Ground |
| Pin 46 | RSVD — Reserved (per datasheet) |
| Pin 47 | RSVD — Reserved (per datasheet) |
| Pin 48 | EP — Exposed thermal pad (GND) |
Aplicaciones típicas
W5500 es adecuado para 6 aplicacións: IoT Sensor Node Ethernet Connectivity, Industrial Ethernet PLC and Modbus Gateway, Smart Home Gateway / Hub, IP Camera Control Plane / Auxiliary Ethernet, Arduino / MCU Ethernet Shield, Point-of-Sale Terminal / Vending Machine Network.
IoT Sensor Node Ethernet Connectivity
The W5500 enables direct Ethernet connectivity for IoT sensor nodes running on small microcontrollers. Its 8 sockets and 32 KB internal buffer allow simultaneous MQTT publish, CoAP subscription, and HTTP control without burdening the host MCU with TCP state machines. The integrated 10/100 PHY eliminates the need for an external MAC/PHY chip, and HP Auto-MDIX removes crossover-cable concerns in field installations. With SPI up to 80 MHz, even Cortex-M0 hosts can sustain 10 Mbps throughput. In a typical deployment, an STM32 or ESP32 drives the W5500 over SPI, while the W5500 handles all TCP/IP framing and replies.
Recomendado
Industrial Ethernet PLC and Modbus Gateway
For industrial PLCs and Modbus TCP gateways, the W5500 provides deterministic, hardwired protocol handling without RTOS overhead. The W5500 supports PPPoE and raw TCP sockets needed to bridge Modbus/TCP and serial slaves in factory automation. The 3.3 V supply and -40 C to +85 C industrial temperature range suit cabinet installations. Up to 8 sockets permit multiple concurrent clients polling, plus a separate management socket for diagnostics. Compared with a software LWIP stack, the hardwired TCP/IP engine removes jitter that could affect real-time control loops.
Recomendado
Smart Home Gateway / Hub
The W5500 is well suited as the wired Ethernet interface of a smart-home gateway that bridges Wi-Fi/Zigbee to cloud services. Up to 8 sockets allow the gateway to keep one socket for cloud MQTT, one for local HTTP control API, one for firmware OTA, and several for device-pairing sessions. The 32 KB buffer absorbs intermittent packet bursts without dropping. The integrated PHY simplifies the small-form-factor hub PCB, and the 7x7 mm 48-pin LQFP footprint keeps the BOM small. WoL enables the gateway to sleep and be awakened by a router-side magic packet for energy savings.
Recomendado
IP Camera Control Plane / Auxiliary Ethernet
In IP cameras the W5500 is often used as the control-plane or auxiliary network port. Its 32 KB internal buffer and 8 sockets allow simultaneous RTSP control messaging, ONVIF discovery, and remote management traffic without interrupting the primary video stream. The integrated 802.3az energy-efficient Ethernet and WoL functions are valuable for PoE-powered camera deployments. The compact 48-pin LQFP and minimum external component count (magnetics, RJ-45, a few caps) simplify dense camera PCB layouts.
Recomendado
Arduino / MCU Ethernet Shield
The W5500 is the de-facto controller for modern Arduino Ethernet shields, including the Arduino Ethernet Shield 2. Compared to the older W5100, the W5500 reduces pin count to 48 and runs SPI up to 80 MHz, leaving more MCU cycles for application logic. With HP Auto-MDIX the shield works with both straight and crossover cables. For Uno, Mega, ESP32, and Raspberry Pi Pico hosts, the Arduino Ethernet library transparently drives the W5500 over SPI. A typical shield adds only the W5500, magnetics, RJ-45 jack, and a 3.3 V LDO.
Recomendado
Point-of-Sale Terminal / Vending Machine Network
POS terminals and vending machine controllers use the W5500 for transaction traffic over wired Ethernet where reliability matters more than throughput. The hardwired TCP/IP stack guarantees that transaction packets are not dropped under host CPU load, and up to 8 sockets permit concurrent payment, telemetry, and remote-management sessions. The -40 C to +85 C temperature range tolerates unconditioned retail and outdoor enclosures. The 3.3 V supply with internal LDOs keeps the power tree simple, and the small LQFP-48 keeps the controller board compact.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para W5500 — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | W5100S | W5100 | W5300 |
|---|---|---|---|---|
| Package | 48-pin LQFP (7x7 mm) | 80-pin LQFP (different footprint) | 80-pin LQFP (different footprint) | 100-pin LQFP (different footprint) |
| Brand | WIZnet | WIZnet (same brand) | WIZnet (same brand) | WIZnet (same brand) |
| Host Interface | SPI up to 80 MHz | SPI up to 70 MHz | SPI indirect 4 MHz + parallel bus | SPI + 8/16-bit parallel bus |
| Number of Sockets | 8 | 4 | 4 | 8 |
| Internal Buffer | 32 KB | 16 KB | 16 KB | 128 KB |
| Ethernet Speed | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps |
| Wake-on-LAN | Yes | Yes | No | No |
| Protocol Stack | TCP/UDP/IPv4/ICMP/ARP/IGMP/PPPoE | TCP/UDP/IPv4/ICMP/ARP/IGMP/PPPoE | TCP/UDP/IPv4/ICMP/ARP/IGMP/PPPoE | TCP/UDP/IPv4/ICMP/ARP/IGMP/PPPoE |
Diferenciadores clave
- Integrated PHY with HP Auto-MDIX (frente a ENC28J60)
- Higher SPI throughput (80 MHz) and larger buffer (32 KB) (frente a W5100)
- Compact 48-pin package with same register map (frente a W5100S)
Notas de diseño
Route the MDI0 and MDI1 pairs as 100-ohm differential traces with tight length matching (typically within 100 mil) directly to the magnetics module. Keep the traces short and avoid stubs - the W5500 embeds the PHY and the MDI signals are 100 MHz-capable. Reference ground continuously and use a 4-layer stack-up with a solid ground plane beneath the MDI pairs to control impedance and EMI.
Decouple both AVDD (analog) and VDD (digital) rails at the chip pins with a 0.1 uF ceramic in parallel with a 10 uF ceramic. Place the 25 MHz crystal (XTALP/XTALN) within 5 mm of the pins, guard it with a ground ring, and tie AGND and GND together at a single point under the exposed pad. Avoid routing high-speed digital signals across the analog section.
Do not leave MISO floating - if your host SPI master does not need the return data, still configure MISO as an input so the W5500 tri-states correctly. Keep CSn deasserted for at least one SCLK cycle between frames per the VSPI timing. The WoL pin requires a 3.3 V level signal; route a 1 kohm pull-up to VDD if unused. Confirm the magnetics match the W5500 reference design - substandard magnetics cause CRC errors above 10 Mbps.
Información de cumplimiento
RoHS and REACH compliance per WIZnet product page. Not AEC-Q100 qualified (industrial/consumer only). Halogen-free status not stated in the verified data.
