EP1AGX20CF484C6N vs EP1AGX20CF484C6NGA مقایسه
مقایسه دقیق کنار به کنار EP1AGX20CF484C6N توسط Intel و EP1AGX20CF484C6NGA توسط Intel. مشخصات کلیدی، پارامترهای الکتریکی، بستهبندی، وضعیت چرخه عمر، قیمتگذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Intel
EP1AGX20CF484C6N - 20K LE Arria GX FPGA with 3.125G Transceivers | Intel
EP1AGX20CF484C6N Obsoleteمقایسه مشخصات
| پارامتر | EP1AGX20CF484C6N | EP1AGX20CF484C6NGA |
|---|---|---|
| برند | Intel | Intel |
| دستهبندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | NRND |
| Series | Arria GX | Arria GX |
| Family | Arria GX FPGA | Intel Arria GX FPGA |
| Logic Elements (LEs) | 21,580 | — |
| Number of LABs/CLBs | 1,079 | — |
| Total Memory Bits | 1,229,184 bits | — |
| Number of User I/O | 230 | — |
| Number of Transceivers | 4 channels at 3.125 Gbps | — |
| Transceiver Data Rate | 3.125 Gbps | — |
| بستهبندی | FBGA-484 (PBGA484) | — |
| Package Dimensions | 23 x 23 mm, 1 mm pitch | — |
| نوع نصب | Surface Mount | Surface Mount |
| دمای کاری | -40C to +85C (industrial) | [DATA_NEEDED: industrial temp range] |
| Process Technology | 90 nm | — |
| Supply Voltage - Core | [DATA_NEEDED: VCCINT nominal] | — |
| Configuration Mode | JTAG, Passive Serial, Passive Parallel | — |
| Lead Free | Yes | — |
| وضعیت RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| سطح حساسیت به رطوبت (MSL) | [DATA_NEEDED: MSL level] | — |
| Logic Elements (LE) | — | 21,580 |
| Total RAM Bits | — | 1,229,184 |
| User I/O Pins | — | 230 |
| بستهبندی / کیس | — | 484-FBGA (23x23 mm) |
| Supplier Device Package | — | 484-FBGA (23x23) |
| Core Voltage - Supply | — | 1.15 V to 1.25 V |
| Speed Grade | — | -6 |
| سطح MSL | — | [DATA_NEEDED: moisture sensitivity level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Method | — | SRAM, JTAG, EPCS flash |
| Transceivers | — | Up to 8 high-speed SERDES channels |
| Hardware Multipliers | — | Embedded 18x18 multipliers |
| PLL Count | — | [DATA_NEEDED: number of PLLs] |