EPF10K50STC144-2 vs EPF10K50STC144-3 مقایسه
مقایسه دقیق کنار به کنار EPF10K50STC144-2 توسط Intel و EPF10K50STC144-3 توسط Altera. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Intel
EPF10K50STC144-2 - 50K Gates FLEX-10KS FPGA, 102 I/O, 144-TQFP | Intel
EPF10K50STC144-2 Obsolete
مقایسه مشخصات
| پارامتر | EPF10K50STC144-2 | EPF10K50STC144-3 |
|---|---|---|
| برند | Intel | Altera |
| دسته‌بندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | Obsolete |
| Series | FLEX-10KS | FLEX 10KS |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements | 2,880 | — |
| Embedded RAM | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins | 102 | — |
| Embedded Array Blocks (EABs) | 20 (per datasheet family) | — |
| Maximum Internal Frequency | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | 0.6 ns (typical) |
| Logic Family | CMOS | — |
| Core Voltage | 5.0 V | 2.5 V |
| بسته‌بندی | 144-TQFP (TQFP-144, 20x20 mm) | 144-LQFP (also called LFQFP / TQFP) |
| Terminal Form | Gull Wing | — |
| دمای کاری | 0 C to 70 C (Commercial) | 0 C to 70 C (commercial) |
| Temperature Grade | Commercial | — |
| نوع نصب | Surface Mount | Surface Mount (Gull-wing leads) |
| Configuration Memory | SRAM-based (volatile) | — |
| Programming Interface | JTAG (IEEE 1149.1), Passive Serial/Parallel | — |
| وضعیت RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | FLEX 10K |
| Typical Gates | — | 50,000 |
| Logic Elements / Cells | — | 2,880 |
| On-chip RAM Bits | — | 40,960 |
| Maximum User I/Os | — | 102 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Internal Operating Frequency | — | 166.67 MHz |
| Speed Grade | — | -3 |
| I/O Voltage | — | 5.0 V (3.3 V LVTTL/LVCMOS compatible) |
| Process Technology | — | 0.22 um CMOS, SRAM-based |
| Configuration | — | SRAM (volatile, requires external EPC) |
| JTAG Boundary Scan | — | Built-in, IEEE Std. 1149.1-1990 compliant |