10AS032E4F27I3LG vs 10AS032E4F29I3LG Comparaison
Comparaison détaillée côte à côte de 10AS032E4F27I3LG par Intel et 10AS032E4F29I3LG par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS032E4F27I3LG | 10AS032E4F29I3LG |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 085,10 | $1 920,00 |
| Family | Arria 10 SX SoC FPGA | — |
| Logic Elements | 320,000 | 320K |
| Hard Processor Subsystem (HPS) | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency | 1.5 GHz | — |
| Speed Grade | E4 (-4, mid-tier) | — |
| Temperature Grade | Industrial (-40C to +100C) | Industrial |
| Boîtier | 672-pin FCBGA (F27, 27x27 mm) | 780-FBGA, FC (29x29 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Niveau MSL | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | — |
| Process Technology | 20 nm | — |
| Transceivers | Up to 24 channels, up to 14.1 Gbps (family-level) | — |
| DSP Blocks | Hardened floating-point DSP (family-level) | [DATA_NEEDED: DSP block count] |
| Memory Interfaces | DDR3 / DDR4 with hard controllers (family-level) | — |
| Configuration Method | JTAG, ASx4, FPP (family-level) | — |
| Device Family | — | Arria 10 SX |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Core Frequency | — | 1.5 GHz |
| Fabric Speed Grade | — | 4 |
| Terminal Form | — | Ball |
| Number of Terminals | — | 780 |
| Package Code | — | BGA |
| Package Shape | — | Square |
| Lead-Free / RoHS | — | Yes (RoHS compliant) |
| Transceiver Count | — | [DATA_NEEDED: number of transceivers and data rate] |
| Embedded Memory | — | [DATA_NEEDED: M20K/MLAB bits] |