10AS032H2F34E2LG vs 10AS032H3F34E2LG Comparaison
Comparaison détaillée côte à côte de 10AS032H2F34E2LG par Intel et 10AS032H3F34E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10AS032H2F34E2LG | 10AS032H3F34E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 380,00 | $1 650,00 |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Device Tier | 10AS032 (mid-density) | — |
| Configuration | SoC FPGA (HPS + FPGA fabric) | — |
| Logic Elements | 320,000 | 320,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Operating Frequency | 1.5 GHz | — |
| Boîtier | 1152-ball FC-FBGA (F34), 35 x 35 mm | — |
| Speed Grade | 2 | H3 |
| Temperature Grade | E2 (commercial/extended) | E2 (Industrial) |
| On-chip Memory (M20K blocks) | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] | — |
| DSP Blocks | Variable-precision, IEEE 754 single-precision FP support | [DATA_NEEDED: DSP block count] |
| Transceivers | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] | [DATA_NEEDED: transceiver count and rate] |
| Memory Controller Hard IP | DDR4, DDR3, QDRII+, RLDRAM3 | — |
| Process Node | 20 nm | 20 nm |
| Type de montage | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| Statut RoHS | Compliant | Compliant (lead-free) |
| Form of Terminal | Ball (BGA) | — |
| Terminal Pitch | 1 mm | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Processor Clock | — | Up to 1.5 GHz |
| Package Code | — | F34 (FCBGA) |
| Pin/Ball Count | — | 1152 |
| Package Size | — | 35 x 35 mm |
| Memory Interface | — | DDR3 / DDR4 with hard controllers |
| Statut du cycle de vie | — | Active |