10AS048H2F34I1HG vs 10AS048H2F34E2LG Comparaison
Comparaison détaillée côte à côte de 10AS048H2F34I1HG par Intel et 10AS048H2F34E2LG par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
10AS048H2F34E2LG - Arria 10 SX 480K SoC FPGA, Dual A9, 1152-FBGA | Intel
10AS048H2F34E2LG ✓ ActifComparaison des spécifications
| Paramètre | 10AS048H2F34I1HG | 10AS048H2F34E2LG |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 520,00 | $2 280,00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX |
| Logic Elements | 480,000 | 480000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum Fabric Frequency | 1.5 GHz | — |
| Boîtier | 1152-FBGA, FC (35x35 mm) | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| User I/O Pins | 492 | — |
| Embedded Memory | [DATA_NEEDED: Mbits embedded memory] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP count] | [DATA_NEEDED: variable-precision DSP block count] |
| Transceivers | Up to 24 channels | [DATA_NEEDED: number / data rate] |
| Maximum Transceiver Data Rate | 17.4 Gbps | — |
| Speed Grade | H2 | — |
| Temperature Grade | Industrial (I1), -40C to 100C | — |
| Process Technology | 20 nm TSMC | 20 nm |
| Type de montage | Surface Mount (BGA) | Surface Mount (flip-chip BGA) |
| Statut RoHS | Compliant | Compliant |
| I/O Standard Support | LVCMOS / LVDS / LVTTL up to 3.3 V | — |
| Core Voltage | — | 0.9 V |
| HPS Maximum Frequency | — | 1.5 GHz |
| Operating Temperature Grade | — | Industrial / Medical (per OPN code H2) |
| Logic Family | — | Arria 10 SoC FPGA |
| Adaptive Logic Modules | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: Mbits] |
| User I/O Banks | — | [DATA_NEEDED: bank count and total user I/O] |
| Niveau MSL | — | 3 (per FBGA package) |