10M08DCV81I7G vs 10M08DCV81C7G Comparaison
Comparaison détaillée côte à côte de 10M08DCV81I7G par Altera et 10M08DCV81C7G par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10M08DCV81I7G | 10M08DCV81C7G |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,85 | $16,20 |
| Product Family | MAX 10 | — |
| Logic Elements (LE) | 8000 | 8000 |
| Embedded User Flash | 387072 bit (378 Kbit) | — |
| Maximum User I/Os | 56 | — |
| Package Type | 81-ball WLCSP (UFBGA, wafer-level chip-scale package) | — |
| Process Node | [DATA_NEEDED: process node] | — |
| Configuration Memory | On-chip dual-configuration flash, instant-on | — |
| Embedded ADC | 12-bit SAR ADC (1 Msps) [DATA_NEEDED: number of channels] | — |
| Température de fonctionnement | Industrial -40C to +100C (I7 grade) | Commercial (0C to +85C) [DATA_NEEDED: temp grade letter C7G] |
| Supply Voltage Core | [DATA_NEEDED: VCC core voltage] | — |
| I/O Bank Count | [DATA_NEEDED: number of I/O banks] | — |
| I/O Standards Supported | LVCMOS, LVTTL, LVDS, SSTL, RSDS | — |
| Memory Interfaces | DDR3, DDR3L, LPDDR2 (external PHY required) | — |
| PLL Count | [DATA_NEEDED: number of PLLs] | — |
| Global Clock Networks | [DATA_NEEDED: clock network count] | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS) | — |
| Type de montage | Surface Mount (WLCSP - requires underfill) | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Statut RoHS | Compliant | Compliant |
| Design Software | Intel Quartus Prime (MAX 10 device support) | — |
| Family | — | MAX 10 |
| Memory Bits | — | 387072 bits |
| Embedded Memory (M9K Blocks) | — | [DATA_NEEDED: M9K block count] |
| Multipliers (18x18) | — | 56 |
| Process Technology | — | 55 nm |
| Core Supply Voltage | — | 1.2 V |
| User I/O Banks | — | [DATA_NEEDED: user I/O count] |
| Boîtier | — | 81-UFBGA, WLCSP |
| Package Code | — | V81 |
| On-chip Configuration Flash | — | Yes (dual-configuration) |
| Integrated ADC | — | Yes (12-bit SAR, hardened) |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Lead Free | — | Yes |