5CSEBA4U23C6N vs 5CSEBA4U23I7LN Comparaison
Comparaison détaillée côte à côte de 5CSEBA4U23C6N par Intel et 5CSEBA4U23I7LN par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA4U23C6N - Cyclone V SE SoC FPGA 40K LE, Dual ARM Cortex-A9 | Intel
5CSEBA4U23C6N ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA4U23C6N | 5CSEBA4U23I7LN |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $86,20 | $99,75 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 40,000 | 40,000 |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Embedded Memory (M10K + MLAB) | 2,460 Kbits | — |
| DSP Blocks (18x18 Multipliers) | 112 | — |
| HPS Processor Cores | Dual ARM Cortex-A9 MPCore | — |
| HPS Maximum CPU Clock | 925 MHz | — |
| Hard Memory Controller | DDR3 / DDR3L / LPDDR2 | — |
| Process Technology | TSMC 28 nm low-power | 28nm TSMC low-power |
| Core Voltage (VCC) | 1.1 V | — |
| General-Purpose FPGA I/Os | 188 | — |
| Transceivers | Not integrated on SE device | 3.125 Gbps (per Cyclone V family) |
| Boîtier | 672-pin UFBGA / UBGA, 23 x 23 mm, 0.8 mm pitch | 672-pin UBGA (23x23 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Température de jonction en fonctionnement | -40 C to +100 C (typical SE spec; exact C6 grade per datasheet) | — |
| Configuration Modes | JTAG (IEEE 1149.1), Active Serial (AS) via EPCS/EPCQ | — |
| Statut RoHS | Compliant | Compliant |
| Processor Cores | — | Dual ARM Cortex-A9 MPCore |
| Processor Clock Speed | — | 925 MHz |
| Température de fonctionnement | — | -40C to +100C (Industrial) |
| Embedded Memory | — | [DATA_NEEDED: exact embedded memory size in bits] |
| DSP Blocks (18x18 multipliers) | — | [DATA_NEEDED: exact multiplier count] |
| External Memory Interface | — | DDR3, DDR2, LPDDR2 (controller integrated in HPS + soft IP in FPGA fabric) |
| Niveau MSL | — | 3 |
| Lead-Free | — | Yes |
| Sans halogène | — | [DATA_NEEDED] |
| Number of GPIOs | — | [DATA_NEEDED: per device variant] |
| Number of PLLs | — | [DATA_NEEDED: per device variant] |