5CSEBA5U19I7N vs 5CSEBA6U19I7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA5U19I7N par Intel et 5CSEBA6U19I7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA5U19I7N | 5CSEBA6U19I7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $119,85 | $142,75 |
| Product Type | SoC FPGA (System-on-Chip FPGA) | — |
| Series | Cyclone V SE | 5CSEBA6 |
| Logic Elements | 85,000 | 110,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | Dual-core ARM Cortex-A9 MPCore |
| Core Frequency | 800 MHz (typical), up to 925 MHz | — |
| Process Technology | 28 nm TSMC low-power | TSMC 28 nm low-power |
| Boîtier | 484-pin UBG (UFBGA) 19x19 mm | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) |
| Tension d'alimentation | 1.1 V core | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) |
| FPGA User I/O | 66 (per datasheet front-page snippet) | — |
| Embedded Memory | Approximately 4,450 Kbits | 4.45 Mbits (M10K + MLAB) |
| DSP Blocks | 87 variable-precision (18x18 multipliers) | 112 (18x18 multipliers) |
| Transceivers | Up to 5 Gbps (Cyclone V SE feature) | Up to 9 channels, 3.125 Gbps |
| HPS Peripherals | USB 2.0 OTG, EMAC, CAN, SPI, I2C, UART, SD/MMC, NAND | — |
| Température de fonctionnement | -40C to +100C (Industrial grade, suffix I) | -40C to +100C (Industrial) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | Compliant (per Heisener listing and product family) | Compliant |
| Family | — | Cyclone V SE SoC FPGA |
| Device Variant | — | 5CSEA6 (U19 package, 110K LE) |
| HPS Maximum Frequency | — | 800 MHz |
| Hard Memory Controller | — | DDR3, DDR3L, LPDDR2 |
| PLLs | — | 6 (FPGA) + 3 (HPS) |
| User I/O Banks | — | 8 |
| Maximum User I/O | — | 288 (package-dependent) |
| Configuration Modes | — | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) |