5CSEBA6U23I7LN vs 5CSEBA6U19I7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA6U23I7LN par Intel et 5CSEBA6U19I7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ ActifComparaison des spécifications
| Paramètre | 5CSEBA6U23I7LN | 5CSEBA6U19I7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $184,83 | $142,75 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 110,000 | 110,000 |
| Processor Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum CPU Clock | 925 MHz | — |
| Boîtier | 672-pin UBGA (UBG-672) 23x23 mm | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | I7 (fast) | — |
| Temperature Range | Industrial (-40C to +100C junction) | — |
| Suffix L | Lead-free | — |
| Suffix N | Tray packaging | — |
| Statut RoHS | Compliant (lead-free suffix) | Compliant |
| Hard Memory Blocks | [DATA_NEEDED: total M10K and MLAB bits] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | 112 (18x18 multipliers) |
| HPS Peripherals | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART, SD/SDIO | — |
| Configuration Mode | JTAG and Active Serial (AS) | — |
| Process Node | TSMC 28 nm low-power | — |
| Design Toolchain | Intel Quartus Prime + SoC EDS | — |
| Series | — | 5CSEBA6 |
| Device Variant | — | 5CSEA6 (U19 package, 110K LE) |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore |
| HPS Maximum Frequency | — | 800 MHz |
| Embedded Memory | — | 4.45 Mbits (M10K + MLAB) |
| Hard Memory Controller | — | DDR3, DDR3L, LPDDR2 |
| Transceivers | — | Up to 9 channels, 3.125 Gbps |
| PLLs | — | 6 (FPGA) + 3 (HPS) |
| User I/O Banks | — | 8 |
| Maximum User I/O | — | 288 (package-dependent) |
| Température de fonctionnement | — | -40C to +100C (Industrial) |
| Process Technology | — | TSMC 28 nm low-power |
| Tension d'alimentation | — | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) |
| Configuration Modes | — | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) |