5CSEBA6U23I7LN vs 5CSEBA6U23I7N Comparaison
Comparaison détaillée côte à côte de 5CSEBA6U23I7LN par Intel et 5CSEBA6U23I7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5CSEBA6U23I7LN | 5CSEBA6U23I7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $184,83 | $51,80 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 110,000 | 110,000 |
| Processor Cores | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum CPU Clock | 925 MHz | — |
| Boîtier | 672-pin UBGA (UBG-672) 23x23 mm | 672-UBGA (UBG A-672) 23x23 mm |
| Type de montage | Surface Mount (BGA) | — |
| Speed Grade | I7 (fast) | 7 |
| Temperature Range | Industrial (-40C to +100C junction) | — |
| Suffix L | Lead-free | — |
| Suffix N | Tray packaging | — |
| Statut RoHS | Compliant (lead-free suffix) | — |
| Hard Memory Blocks | [DATA_NEEDED: total M10K and MLAB bits] | — |
| DSP Blocks | [DATA_NEEDED: variable-precision DSP block count] | 224 (variable-precision) |
| HPS Peripherals | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART, SD/SDIO | — |
| Configuration Mode | JTAG and Active Serial (AS) | — |
| Process Node | TSMC 28 nm low-power | — |
| Design Toolchain | Intel Quartus Prime + SoC EDS | — |
| Process Technology | — | 28 nm TSMC low-power |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz |
| Embedded Memory | — | 5,662 Kbits (M10K + MLAB) |
| Maximum User I/O | — | 364 |
| Core Voltage | — | 1.1 V |
| Température de fonctionnement | — | -40C to +100C (industrial, junction) |
| Temperature Grade | — | Industrial (I) |
| Lead-Free / RoHS | — | Yes (Pb-free, N suffix) |
| DDR Controller | — | 32-bit DDR3/LPDDR2 with ECC |
| Configuration | — | FPGA + HPS integrated SoC |