5M80ZM68I5N vs 5M240ZM68I5N Comparaison
Comparaison détaillée côte à côte de 5M80ZM68I5N par Intel et 5M240ZM68I5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 5M80ZM68I5N | 5M240ZM68I5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $4,15 | $1,25 |
| Family | MAX V | — |
| Macro Cells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| User I/O Pins | 52 | — |
| User Flash Memory | 160 bits | — |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Boîtier | 68-ball MBGA (5M80ZM68) | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +100C (Industrial) | — |
| Programming Interface | JTAG (IEEE 1149.1) + ISP | — |
| Operating Mode | Non-volatile, instant-on | — |
| Statut RoHS | Compliant | Compliant |
| Lead-Free / Halogen-Free | Yes / Unknown | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Series | — | MAX V |
| Logic Elements | — | 240 |
| Number of Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Configuration Memory | — | Nonvolatile Flash |
| Package Type | — | TFBGA-68 |
| Number of Terminals | — | 68 (ball) |
| Package Code | — | TFBGA |
| Form of Terminal | — | Ball |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| JTAG Interface | — | TMS, TDI, TDO, TCK (Bank 1) |
| Programming Method | — | JTAG / in-system programmable |
| Tension d'alimentation | — | [DATA_NEEDED: VCCINT and VCCIO levels] |
| I/O Standards | — | Multiple (LVTTL, LVCMOS, SSTL, etc., per MAX V doc; PCI and 1.2 V LVCMOS excluded for JTAG pins) |
| Lead Free | — | Yes |