A3PE3000-2FGG896 vs A3PE3000L-FGG896M Comparaison
Comparaison détaillée côte à côte de A3PE3000-2FGG896 par Microchip Technology et A3PE3000L-FGG896M par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
A3PE3000-2FGG896 - 3M-Gate ProASIC3E Flash FPGA | Microchip
A3PE3000-2FGG896 ✓ ActifMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ ActifComparaison des spécifications
| Paramètre | A3PE3000-2FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $128,00 | $0,00 |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| Number of System Gates | 3,000,000 | — |
| Number of I/Os | 620 | — |
| Supply Voltage (Core) | 1.425 V to 1.575 V (1.5 V nominal) | — |
| Speed Grade | -2 | — |
| Boîtier | 896-BGA / 896-FBGA (31x31 mm, 1.0 mm ball pitch) | 896-ball FBGA (FGG896), 1 mm pitch |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to 85C (TJ) | 0 to 70 C |
| Configuration Memory | On-chip Flash (non-volatile, single chip) | — |
| Technology | CMOS flash | — |
| Soft ARM Support | Optional (per ProASIC3E datasheet) | — |
| Packaging | Tray | — |
| Statut RoHS | ROHS3 Compliant (G suffix) | — |
| Manufacturer Lead Time | 8 weeks | — |
| Product Status | Active | — |
| Total System Performance | [DATA_NEEDED: system performance] | — |
| System Gates | — | 3,000,000 |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Voltage | — | 1.2 V to 1.5 V |
| Tension d'alimentation | — | 1.5 V |
| Logic Family | — | CMOS |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |