A42MX16-1PQG100 vs A42MX16-PQ100 Comparaison
Comparaison détaillée côte à côte de A42MX16-1PQG100 par Microchip Technology et A42MX16-PQ100 par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | A42MX16-1PQG100 | A42MX16-PQ100 |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $1,00 |
| Family | MX (42MX) | 42MX (Actel MX) |
| System Gates | 24000 | — |
| User I/O | 83 | — |
| Program Type | One-Time Programmable (antifuse) | — |
| Tension d'alimentation | 5.0 V | 3.3 V / 5 V |
| Speed Grade | -1 | — |
| Temperature Grade | Commercial | — |
| Boîtier | 100-BQFP (PQFP-100), gull-wing | 100-PQFP (BQFP), surface mount |
| Type de montage | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| Number of Terminals | 100 | — |
| Configuration Memory | Non-volatile antifuse (no boot PROM) | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1, per MX family datasheet) | — |
| Primary Use Case | Legacy PLD consolidation, ASIC alternative | — |
| Lead Free | Yes (G suffix) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Logic Gates | — | 24K gates (up to 54,000 system gates) |
| Logic Cells | — | 608 |
| System Frequency | — | 103 MHz / 172 MHz |
| Process Technology | — | 0.45 um |
| Embedded SRAM | — | 2.5 kbits configurable dual-port |
| Programming Technology | — | Antifuse (one-time programmable, non-volatile) |
| User I/O (PQ100 package) | — | 83 |
| Maximum User I/O (device) | — | Up to 202 |
| Pin Locking | — | 100% pin locking |
| Boundary Scan | — | Yes (JTAG boundary-scan register chain, TDI to TDO) |