ADC1213D125HN-C1 vs ADC1112D125HN-C18 Comparaison
Comparaison détaillée côte à côte de ADC1213D125HN-C1 par NXP Semiconductors et ADC1112D125HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
ADC1213D125HN-C1 - Dual 12-bit 125 Msps ADC w/ JESD204A | NXP
ADC1213D125HN-C1 ✓ ActifRenesas Electronics
ADC1112D125HN-C18 - Dual 11-bit 125MSPS ADC, LVDS/CMOS | Renesas
ADC1112D125HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | ADC1213D125HN-C1 | ADC1112D125HN-C18 |
|---|---|---|
| Marque | NXP Semiconductors | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $31,20 | $9,48 |
| Number of Bits | 12 bit | — |
| Number of Channels | 2 (dual) | 2 (dual, simultaneous sampling) |
| Fréquence d'échantillonnage | 125 Msps (also 65/80/105 Msps modes) | — |
| Data Interface | Serial JESD204A (subclass 0) | — |
| JESD204A Lanes | 2 lanes, up to 1.25 Gbps per lane | — |
| Architecture | Pipelined with per-channel sample-and-hold | — |
| Analog Supply Voltage | 1.8 V | — |
| Digital Supply Voltage | 1.8 V | — |
| Input Type | Differential analog inputs (per channel) | Single-ended analog inputs (per channel) |
| Boîtier | 56-HVQFN exposed pad (8x8 mm) | HVQFN-64 (8x8 mm with exposed thermal pad) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40 C to +85 C |
| Internal Voltage Reference | Yes (on-chip) | — |
| Per-Channel Gain Adjustment | Yes (programmable) | — |
| Power Consumption | [DATA_NEEDED: typical power at 125 Msps] | — |
| Statut RoHS | Compliant | Compliant |
| Résolution | — | 11-bit |
| Sample Rate (Max) | — | 125 Msps |
| Analog Supply Voltage (AVDD) | — | 3.0 V to 3.6 V |
| Digital I/O Supply (OVDD) | — | 1.8 V to 3.3 V |
| Output Interface | — | CMOS or LVDS DDR (selectable) |
| Reference | — | Internal programmable (0-6 dB in 1 dB steps) or external |
| Control Interface | — | SPI (3-wire, mode configuration) |
| Power-Down Mode | — | Yes, per-channel via SPI |
| Niveau MSL | — | 3 (168 hours) |