ADS62P23IRGC25 vs ADC1213D080HN-C18 Comparaison
Comparaison détaillée côte à côte de ADS62P23IRGC25 par Texas Instruments et ADC1213D080HN-C18 par Renesas Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Texas Instruments
ADS62P23IRGC25 - Dual 12-bit 80MSPS ADC, DDR LVDS/CMOS | TI
ADS62P23IRGC25 ✓ ActifRenesas Electronics
ADC1213D080HN-C18 - 12-bit 80MSPS Dual ADC with JESD204A | Renesas
ADC1213D080HN-C18 ✓ ActifComparaison des spécifications
| Paramètre | ADS62P23IRGC25 | ADC1213D080HN-C18 |
|---|---|---|
| Marque | Texas Instruments | Renesas Electronics |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18,85 | $21,75 |
| Manufacturer | Texas Instruments | — |
| Résolution | 12 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 (dual, simultaneous sampling) |
| Sampling Rate (Max) | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Output Interface | DDR LVDS or Parallel CMOS (selectable) | — |
| Input Type | Differential analog inputs | Differential / single-ended (configurable) |
| Max Analog Input Voltage | 2 V | — |
| Boîtier | 64-VQFN (RGC) 9x9 mm | 56-VFQFPN exposed pad (8x8 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Plage de température de fonctionnement | -40C to +85C (industrial) | -40 C to +85 C (industrial) |
| Internal Reference | Yes (external reference also supported) | — |
| Family Member Context | ADS62P2X family (65/80/105/125 MSPS versions) | — |
| Statut RoHS | Compliant | Compliant |
| Niveau MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Product Family | ADS62P2X | — |
| Sampling Rate per Channel | — | 80 MSPS |
| Data Output Interface | — | JESD204A (serial, up to 3.125 Gbps lane) |
| Analog Supply Voltage (AVDD) | — | 1.8 V |
| Digital/Drive Supply Voltage (DRVDD) | — | 3.3 V |
| Input Bandwidth | — | [DATA_NEEDED: full-power input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| ENOB | — | [DATA_NEEDED: ENOB bits at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc] |
| Power Consumption | — | [DATA_NEEDED: power mW per channel at 80 MSPS] |
| Configuration Interface | — | SPI-compatible serial |
| Lead-Free | — | Yes |