ADS62P23IRGC25 vs ADC1213D080HN-C18 Comparação
Comparação detalhada lado a lado de ADS62P23IRGC25 por Texas Instruments e ADC1213D080HN-C18 por Renesas Electronics. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
Texas Instruments
ADS62P23IRGC25 - Dual 12-bit 80MSPS ADC, DDR LVDS/CMOS | TI
ADS62P23IRGC25 ✓ AtivoRenesas Electronics
ADC1213D080HN-C18 - 12-bit 80MSPS Dual ADC with JESD204A | Renesas
ADC1213D080HN-C18 ✓ AtivoComparação de especificações
| Parâmetro | ADS62P23IRGC25 | ADC1213D080HN-C18 |
|---|---|---|
| Marca | Texas Instruments | Renesas Electronics |
| Categoria | ADC/DAC | ADC/DAC |
| Status do ciclo de vida | Ativo | Ativo |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $18,85 | $21,75 |
| Manufacturer | Texas Instruments | — |
| Resolução | 12 bit | 12 bit |
| Number of Channels | 2 (dual) | 2 (dual, simultaneous sampling) |
| Sampling Rate (Max) | 80 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Output Interface | DDR LVDS or Parallel CMOS (selectable) | — |
| Input Type | Differential analog inputs | Differential / single-ended (configurable) |
| Max Analog Input Voltage | 2 V | — |
| Encapsulamento | 64-VQFN (RGC) 9x9 mm | 56-VFQFPN exposed pad (8x8 mm) |
| Tipo de montagem | Surface Mount | Surface Mount |
| Faixa de temperatura de operação | -40C to +85C (industrial) | -40 C to +85 C (industrial) |
| Internal Reference | Yes (external reference also supported) | — |
| Family Member Context | ADS62P2X family (65/80/105/125 MSPS versions) | — |
| Status RoHS | Compliant | Compliant |
| Nível MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Product Family | ADS62P2X | — |
| Sampling Rate per Channel | — | 80 MSPS |
| Data Output Interface | — | JESD204A (serial, up to 3.125 Gbps lane) |
| Analog Supply Voltage (AVDD) | — | 1.8 V |
| Digital/Drive Supply Voltage (DRVDD) | — | 3.3 V |
| Input Bandwidth | — | [DATA_NEEDED: full-power input bandwidth MHz] |
| SNR | — | [DATA_NEEDED: SNR dBFS at fIN] |
| ENOB | — | [DATA_NEEDED: ENOB bits at fIN] |
| SFDR | — | [DATA_NEEDED: SFDR dBc] |
| Power Consumption | — | [DATA_NEEDED: power mW per channel at 80 MSPS] |
| Configuration Interface | — | SPI-compatible serial |
| Lead-Free | — | Yes |