ADSP-1012AKG vs ADSP-1012AJG Comparaison
Comparaison détaillée côte à côte de ADSP-1012AKG par Analog Devices et ADSP-1012AJG par Analog Devices. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | ADSP-1012AKG | ADSP-1012AJG |
|---|---|---|
| Marque | Analog Devices | Analog Devices |
| Catégorie | DSP | DSP |
| Statut du cycle de vie | Actif | Unknown |
| Multiplier Resolution | 12 x 12 bit | — |
| Product Function | Digital multiplier | — |
| Device Category | DSP peripheral | DSP peripheral, multiplier |
| Process Technology | CMOS | CMOS |
| Package Type | 68-pin ceramic PGA | CPGA68, hermetic sealed |
| Package Designation | PGA-68 | — |
| Hermetic Sealing | Hermetically sealed | — |
| Package Dimensions | 27.89 x 27.89 mm | 27.89 mm x 27.89 mm |
| Manufacturer | Analog Devices Inc. | — |
| Output Linearity | High linearity | — |
| Distortion Performance | Low distortion | — |
| Operating Voltage Range | [DATA_NEEDED: operating voltage range] | — |
| Fréquence d'horloge maximale | [DATA_NEEDED: maximum clock frequency] | — |
| Power Consumption | [DATA_NEEDED: power consumption] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Fonction | — | 12-bit DSP multiplier |
| Multiplier Configuration | — | 12 x 12 CMOS multiplier |
| Output Data Bus Width | — | 24 bit |
| Nominal Supply Voltage | — | 5 V |
| Maximum Supply Current | — | 60 mA |
| Number of Terminals | — | 68 |
| Package Code | — | PGA |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Type de montage | — | Through-hole PGA |
| Input Bit Width | — | 12 bit |
| Product Lifecycle Status | — | [DATA_NEEDED: lifecycle status] |
| Clock Frequency | — | [DATA_NEEDED: clock frequency] |
| Logic Levels | — | [DATA_NEEDED: input and output logic levels] |
| Pinout | — | [DATA_NEEDED: complete pin assignment] |