ADSP-1012AKG vs ADSP-1012AJG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng ADSP-1012AKG sa pamamagitan ng Analog Devices at ADSP-1012AJG sa pamamagitan ng Analog Devices. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | ADSP-1012AKG | ADSP-1012AJG |
|---|---|---|
| Brand | Analog Devices | Analog Devices |
| Kategorya | DSP | DSP |
| Katayuan ng Lifecycle | Aktibo | Unknown |
| Multiplier Resolution | 12 x 12 bit | — |
| Product Function | Digital multiplier | — |
| Device Category | DSP peripheral | DSP peripheral, multiplier |
| Process Technology | CMOS | CMOS |
| Package Type | 68-pin ceramic PGA | CPGA68, hermetic sealed |
| Package Designation | PGA-68 | — |
| Hermetic Sealing | Hermetically sealed | — |
| Package Dimensions | 27.89 x 27.89 mm | 27.89 mm x 27.89 mm |
| Manufacturer | Analog Devices Inc. | — |
| Output Linearity | High linearity | — |
| Distortion Performance | Low distortion | — |
| Operating Voltage Range | [DATA_NEEDED: operating voltage range] | — |
| Maksimum na Taktiko ng Oras | [DATA_NEEDED: maximum clock frequency] | — |
| Power Consumption | [DATA_NEEDED: power consumption] | — |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Fungsi | — | 12-bit DSP multiplier |
| Multiplier Configuration | — | 12 x 12 CMOS multiplier |
| Output Data Bus Width | — | 24 bit |
| Nominal Supply Voltage | — | 5 V |
| Maximum Supply Current | — | 60 mA |
| Number of Terminals | — | 68 |
| Package Code | — | PGA |
| Package Shape | — | Square |
| Temperature Grade | — | Commercial |
| Uri ng Pagpapasok | — | Through-hole PGA |
| Input Bit Width | — | 12 bit |
| Product Lifecycle Status | — | [DATA_NEEDED: lifecycle status] |
| Clock Frequency | — | [DATA_NEEDED: clock frequency] |
| Logic Levels | — | [DATA_NEEDED: input and output logic levels] |
| Pinout | — | [DATA_NEEDED: complete pin assignment] |