ATSAMA5D225C-D1M-CUR vs ATSAMA5D28B-CUR Comparaison
Comparaison détaillée côte à côte de ATSAMA5D225C-D1M-CUR par Microchip Technology et ATSAMA5D28B-CUR par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
ATSAMA5D225C-D1M-CUR - ARM Cortex-A5 MPU 500MHz 128Mbit DDR2 | Microchip
ATSAMA5D225C-D1M-CUR ✓ ActifMicrochip Technology
ATSAMA5D28B-CUR - 500MHz Cortex-A5 MPU 289-LFBGA | Microchip
ATSAMA5D28B-CUR ✓ ActifComparaison des spécifications
| Paramètre | ATSAMA5D225C-D1M-CUR | ATSAMA5D28B-CUR |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,80 | $12,60 |
| Family | SAMA5D2 Series | — |
| Core | ARM Cortex-A5 (32-bit, single-core) | — |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| Integrated Memory | 128 Mbit DDR2 SDRAM (16-bit data bus) | — |
| Boîtier | 196-ball TFBGA, 11x11 mm, 0.8 mm pitch | 289-LFBGA (14x14 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| Security | Arm TrustZone, tamper detection, secure boot, secure data storage | — |
| Cryptography | AES, SHA, TRNG hardware accelerators | — |
| Graphics | LCD TFT controller (up to 1024x768) | — |
| Touch Controller | Peripheral Touch Controller (PTC) | — |
| Audio | Embedded audio subsystem with sample-rate converters | — |
| Connectivity | 10/100 Ethernet MAC, USB HS Host/Device, CAN-FD, multiple SPI/I2C/UART | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | Compliant (BGA GREEN) | Compliant |
| Tension d'alimentation | [DATA_NEEDED: VDD core/IO supply range] | — |
| Boot Media Supported | QSPI NOR, NAND, eMMC, SD card | — |
| Tape & Reel Packaging | Yes (per Mouser listing) | — |
| Core Architecture | — | ARM Cortex-A5 (ARMv7-A) |
| Number of Cores | — | 1 |
| L1 Instruction Cache | — | 32 kbyte |
| L1 Data Cache | — | 32 kbyte |
| L2 Cache / SRAM | — | 128 kbyte (configurable) |
| Memory Management Unit | — | Yes (full MMU) |
| NEON Media Engine | — | Yes (SIMD) |
| Arm TrustZone | — | Yes |
| DRAM Controller | — | LPDDR1/2/3, DDR2/3/3L, 16-bit, with ECC |
| External Bus | — | QSPI |
| Ethernet | — | 10/100 Mbps (1x) |
| USB | — | USB 2.0 + HSIC |
| Température de fonctionnement | — | -40C to +85C (Industrial) |
| Supply Voltage I/O | — | 3.3 V |