ATSAMG53N19A-AU vs ATSAMG55J19A-AU Comparaison
Comparaison détaillée côte à côte de ATSAMG53N19A-AU par Microchip Technology et ATSAMG55J19A-AU par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
ATSAMG55J19A-AU - 120MHz Cortex-M4 MCU 512KB Flash | Microchip
ATSAMG55J19A-AU ✓ ActifComparaison des spécifications
| Paramètre | ATSAMG53N19A-AU | ATSAMG55J19A-AU |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1,05 | $3,99 |
| Core Architecture | ARM Cortex-M4 with FPU | ARM Cortex-M4 with FPU |
| Core Clock Speed | 48 MHz | — |
| Bit Width | 32-bit | — |
| Program Memory (Flash) | 512 KB (512K x 8) | — |
| RAM | 96 KB | — |
| Tension d'alimentation | 1.5 V to 3.6 V | — |
| Température de fonctionnement | -40 C to +85 C (Industrial) | -40 C to +85 C (industrial) |
| Boîtier | LQFP-100 (14x14 mm) | 64-LQFP (10x10 mm) |
| GPIO Count | Up to 38 | — |
| ADC | 12-bit, up to 1 MSPS | 12-bit SAR |
| USB | USB 2.0 Full-Speed device with on-chip transceiver | USB 2.0 Full-Speed device/host |
| Communication Peripherals | USART/UART/SPI/TWI/I2C | USART/UART, SPI, TWI (I2C), I2S, HS USB |
| Oscillator | Internal 8 MHz, external 32.768 kHz RTC crystal support | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 (per industry standard) | — |
| Statut RoHS | Compliant | Compliant |
| Core Clock Speed (max) | — | 120 MHz |
| Instruction Set | — | 32-bit RISC + DSP extensions + FPU (single-precision) |
| Program Flash Memory | — | 512 KB (512K x 8) |
| SRAM (Total) | — | 160 KB |
| Backup SRAM with Retention | — | 16 KB (retained in deep sleep) |
| Supply Voltage (VDDIO/VDDCORE) | — | 1.62 V to 3.6 V |
| Audio Interface | — | I2S with PDM/TDM and sample-rate converter |
| External Bus Interface (EBI) | — | Yes (for SRAM/SDRAM/NOR Flash expansion) |
| Active Power Consumption | — | Down to 100 uA/MHz |
| Deep Sleep Current | — | Below 7 uA with SRAM retention |
| Wake-up Time (deep sleep to first instruction) | — | Down to 3 us |
| Lifecycle / New Design Recommendation | — | Active (new designs: consider ATSAMG55J19B Revision B) |