CDK1308DILP40 vs CDK1308AILP40 Comparaison
Comparaison détaillée côte à côte de CDK1308DILP40 par MaxLinear et CDK1308AILP40 par MaxLinear. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | CDK1308DILP40 | CDK1308AILP40 |
|---|---|---|
| Marque | MaxLinear | MaxLinear |
| Catégorie | ADC/DAC | ADC/DAC |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,20 | $4,10 |
| Résolution | 10 bit | 10 bit |
| Sampling Rate (max) | 80 MSPS | — |
| Number of Channels | 1 | — |
| SNR | 61.6 dB at Fin = 8 MHz | — |
| Power Dissipation | 46 mW | — |
| Analog Supply Voltage | 1.8 V | — |
| Digital I/O Supply Voltage | 1.7 V to 3.6 V | — |
| Output Interface | Parallel CMOS | — |
| Input Type | Single-ended | — |
| Reference | Internal | Internal (no external reference required) |
| Architecture | Pipeline | Proprietary, digital error correction |
| Plage de température de fonctionnement | -40C to +85C | [DATA_NEEDED: operating temperature range] |
| Boîtier | 40-pin QFN (6x6 mm) | 40-pin QFN |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant | Compliant (per distributor listings) |
| Pin Compatible With | CDK1307 family | — |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Digital Interface | — | CMOS, parallel |
| Control Interface | — | CMOS |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| Tension d'alimentation | — | [DATA_NEEDED: AVDD / DRVDD values] |
| Manufacturer | — | MaxLinear (formerly Exar Corporation) |