CDK1308DILP40 vs CDK1308AILP40 Comparación
Comparación detallada lado a lado de CDK1308DILP40 por MaxLinear y CDK1308AILP40 por MaxLinear. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | CDK1308DILP40 | CDK1308AILP40 |
|---|---|---|
| Marca | MaxLinear | MaxLinear |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,20 | $4,10 |
| Resolución | 10 bit | 10 bit |
| Sampling Rate (max) | 80 MSPS | — |
| Number of Channels | 1 | — |
| SNR | 61.6 dB at Fin = 8 MHz | — |
| Power Dissipation | 46 mW | — |
| Analog Supply Voltage | 1.8 V | — |
| Digital I/O Supply Voltage | 1.7 V to 3.6 V | — |
| Output Interface | Parallel CMOS | — |
| Input Type | Single-ended | — |
| Reference | Internal | Internal (no external reference required) |
| Architecture | Pipeline | Proprietary, digital error correction |
| Rango de temperatura de funcionamiento | -40C to +85C | [DATA_NEEDED: operating temperature range] |
| Encapsulado | 40-pin QFN (6x6 mm) | 40-pin QFN |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | Compliant (per distributor listings) |
| Pin Compatible With | CDK1307 family | — |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Digital Interface | — | CMOS, parallel |
| Control Interface | — | CMOS |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| Tensión de alimentación | — | [DATA_NEEDED: AVDD / DRVDD values] |
| Manufacturer | — | MaxLinear (formerly Exar Corporation) |